Datasheet
LPC55S6x All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2019. All rights reserved.
Product data sheet Rev. 1.0 — 26 February 2019 34 of 123
NXP Semiconductors
LPC55S6x
32-bit ARM Cortex-M33 microcontroller
PIO1_31 H6 91
[2]
Z I/O 0 PIO1_31 — General-purpose digital input/output pin.
I/O 1 MCLK — MCLK input or output for I2S.
O2SD1_CLK — SD/MMC 1 card clock.
O3CTIMER0_MAT2 — 32-bit CTimer0 match output 2.
O4SCT0_OUT6 — SCTimer/PWM output 6.
5 R — Reserved.
6 R — Reserved.
I7PLU_INPUT0 — PLU input 0.
8 R — Reserved.
FB N9 45 - - Feedback node (regulated output) of DCDC converter.
LX N11 48 - - DCDC converter power stage output.
RESETN J6 32
[5]
- I External reset input: A LOW on this pin resets the device, causing
I/O ports and peripherals to take on their default states, and the
boot code to execute. Wakes up the part from deep power-down
mode.
USB0_3V3 A3 96 - - USB0 analog 3.3 V supply.
USB0_DM A1 98
[6][8]
I/O USB0 bidirectional D- line.
USB0_DP A2 97
[6][8]
I/O USB0 bidirectional D+ line.
USB0_VSS B1 99 USB0 analog 3.3 V ground.
USB1_DM N6 35
[6][8]
I/O USB1 bidirectional D- line.
USB1_DP M6 34
[6][8]
I/O USB1 bidirectional D+ line.
USB1_VBUS N8 36
[6][8]
I VBUS pin (power on USB cable).
USB1_3V3 N7 38
[10]
- - USB1 analog 3.3 V supply.
USB1_VSS N5 33; 37 - - USB1 analog 3.3 V ground.
VBAT_DCDC N13 49, 50
[9]
- - Supply of DCDC output stage. DCDC core supply (references and
regulation stages).
VBAT_ PMU M13 51
[9]
- - Analog supply.
VDD M1; A5;
A9; A13
15; 25;
44; 63;
69;75;
84; 95;
100
- - Single 1.8 V to 3.6 V power supply powers I/Os.
VDD_PMU M9 39 - - Core supply. For applications with DCDC converter, VDD_PMU and
FB are tied at PCB level.
VDDA G2 16 - - Analog supply voltage. At PCB level, has to be tied to main supply
(VBAT_PMU, VBAT_DCDC)
VREFN H1 18 - - ADC negative reference voltage.
VREFP G1 17 - - ADC positive reference voltage.
VSS N1; B5;
B9; B13
exposed
pad
- - Ground.
Table 3. Pin description …continued
Symbol
98 pin VFBGA
100 pin HLQFP
Reset state
[1]
Type
Function #
Description