Datasheet

LPC55S6x All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2019. All rights reserved.
Product data sheet Rev. 1.0 — 26 February 2019 31 of 123
NXP Semiconductors
LPC55S6x
32-bit ARM Cortex-M33 microcontroller
PIO1_21 M7 30
[2]
Z I/O 0 PIO1_21 — General-purpose digital input/output pin.
I/O 1 FC7_CTS_SDA_SSEL0 — Flexcomm 7: USART clear-to-send,
I2C data I/O, SPI Slave Select 0.
2 R — Reserved.
O3CTIMER3_MAT2 — 32-bit CTimer3 match output 2.
4 R — Reserved.
I/O 5 FC4_RXD_SDA_MOSI_DATA — Flexcomm 4: USART receiver,
I2C data I/O, SPI master-out/slave-in data, I2S data I/O.
6 R — Reserved.
O7PLU_OUT3 — PLU output 3.
8 R — Reserved.
PIO1_22 M8 41
[2]
Z I/O 0 PIO1_22 — General-purpose digital input/output pin.
1 R — Reserved.
I/O 2 SD0_CMD — SD/MMC 0 card command I/O.
O3CTIMER2_MAT3 — 32-bit CTimer2 match output 3.
I4SCT0_GPI5 — Pin input 5 to SCTimer/PWM.
I/O 5 FC4_SSEL3 — Flexcomm 4: SPI slave select 3.
6 R — Reserved.
O7PLU_OUT4 — PLU output 4.
PIO1_23 J8 42
[2]
Z I/O 0 PIO1_23 — General-purpose digital input/output pin.
I/O 1 FC2_SCK — Flexcomm 2: USART, SPI, or I2S clock.
O2SCT0_OUT0 — SCTimer/PWM output 0.
I/O 3 SD1_D[3] — SD/MMC 1 data 3.
4 R — Reserved.
I/O 5 FC3_SSEL2 — Flexcomm 3: SPI slave select 2.
6 R — Reserved.
O7PLU_OUT5 — PLU output 5.
8 R — Reserved.
PIO1_24 F6 3
[2]
Z I/O 0 PIO1_24 — General-purpose digital input/output pin.
I/O 1 FC2_RXD_SDA_MOSI_DATA — Flexcomm 2: USART receiver,
I2C data I/O, SPI master-out/slave-in data, I2S data I/O.
O2SCT0_OUT1 — SCTimer/PWM output 1.
I/O 3 SD1_D[1] — SD/MMC 1 data 1.
4 R — Reserved.
I/O 5 FC3_SSEL3 — Flexcomm 3: SPI slave select 3.
6 R — Reserved.
O7PLU_OUT6 — PLU output 6.
8 R — Reserved.
Table 3. Pin description …continued
Symbol
98 pin VFBGA 100 pin HLQFP Reset state
[1]
Type Function #
Description