Datasheet

LPC55S6x All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2019. All rights reserved.
Product data sheet Rev. 1.0 — 26 February 2019 11 of 123
NXP Semiconductors
LPC55S6x
32-bit ARM Cortex-M33 microcontroller
PIO0_2/
TRST
B11 81
[2]
PD I/O 0 PIO0_2 — General-purpose digital input/output pin. In boundary
scan mode: TRST (Test Reset).
Remark: In ISP mode, this pin is set to the Flexcomm 3 SPI MISO
function.
I/O 1 FC3_TXD_SCL_MISO_WS — Flexcomm 3: USART transmitter,
I2C clock, SPI master-in/slave-out data I/O, I2S word-select/frame.
I2CTIMER_INP1 — Capture input to CTIMER input multiplexers.
O3SCT0_OUT0 — SCTimer/PWM output 0.
I4SCT0_GPI2 — Pin input 2 to SCTimer/PWM.
5 R — Reserved.
6 R — Reserved.
7 R — Reserved.
8 R — Reserved.
9 R — Reserved.
I/O 10 SEC_PIO0_2 — Secure GPIO pin.
PIO0_3/
TCK
F8 83
[2]
Z I/O 0 PIO0_3 — General-purpose digital input/output pin. In boundary
scan mode: TCK (Test Clock In).
Remark: In ISP mode, this pin is set to the Flexcomm 3 SPI MOSI
function.
I/O 1 FC3_RXD_SDA_MOSI_DATA — Flexcomm 3: USART receiver,
I2C data I/O, SPI master-out/slave-in data, I2S data I/O.
O2CTIMER0_MAT1 — 32-bit CTimer0 match output 1.
O3SCT0_OUT1 — SCTimer/PWM output 1.
I4SCT0_GPI3 — Pin input 3 to SCTimer/PWM.
5 R — Reserved.
6 R — Reserved.
7 R — Reserved.
8 R — Reserved.
9 R — Reserved.
I/O 10 SEC_PIO0_3 — Secure GPIO pin.
Table 3. Pin description …continued
Symbol
98 pin VFBGA 100 pin HLQFP Reset state
[1]
Type Function #
Description