Datasheet

LPC540xx All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet Rev. 1.8 — 22 June 2018 91 of 168
NXP Semiconductors
LPC540xx
32-bit ARM Cortex-M4 microcontroller
[1] Typical ratings are not guaranteed. Typical values listed are at room temperature (25 C), VDD = 1.8 V.
[2] Characterized through bench measurements using typical samples.
[3] Tested in production. VDD = 1.71 V. At hot temperature and below 2.0 V, the supply current increases slightly because of reduction of
available RBB (reverse body bias) voltage.
Conditions: V
DD
= 3.3 V; T
amb
= 25 °C; active mode; all peripherals disabled; BOD disabled;
Measured with Keil uVision v.5.23. Optimization level 0, optimized for time off.
12 MHz, 24 MHz, 48 MHz, and 96 MHz: FRO enabled; PLL disabled.
36 MHz, 60 MHz, 72 MHz, 84 MHz, 108 MHz, 120 MHz, 132 MHz, 144 MHz, 156 MHz, 168 MHz,
and 180 MHz: FRO enabled; PLL enabled.
CoreMark A/MHz from SRAMX: SRAM0 is powered.
Fig 14. CoreMark power consumption: typical A/MHz vs. frequency (MHz) SRAMX
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Table 15. Static characteristics: Power consumption in deep-sleep and deep power-down modes
T
amb
=
40
C to +105
C, unless otherwise specified, 1.71 V
V
DD
2.2 V.
Symbol Parameter Conditions Min Typ
[1][2]
Max
[3]
Unit
I
DD
supply current Deep-sleep mode:
SRAMX (64KB) powered
T
amb
=25 C
-54 175A
SRAMX (64 KB) powered
T
amb
= 105 C
- - 2092 A
Deep power-down mode
RTC oscillator input grounded (RTC oscillator
disabled)
T
amb
=25 C
- 709 1.1 A
RTC oscillator input grounded (RTC oscillator
disabled)
T
amb
=105C
-- 27 A
RTC oscillator running with external crystal
VDD = VDDA = VREFP = VBAT = 1.8 V
- 320 - nA