Datasheet

LPC540xx All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet Rev. 1.8 — 22 June 2018 90 of 168
NXP Semiconductors
LPC540xx
32-bit ARM Cortex-M4 microcontroller
10.3 Power consumption
Power measurements in Active, sleep, and deep-sleep modes were performed under the
following conditions:
• Configure all pins as GPIO with pull-up resistor disabled in the IOCON block.
• Configure GPIO pins as outputs using the GPIO DIR register.
• Write 1 to the GPIO CLR register to drive the outputs LOW.
• All peripherals disabled.
[1] Typical ratings are not guaranteed. Typical values listed are at room temperature (25 C), 3.3V.
[2] Clock source FRO. PLL disabled.
[3] Characterized through bench measurements using typical samples.
[4] Compiler settings: Keil uVision v.5.23, optimization level 0, optimized for time off.
[5] Clock source FRO. PLL enabled.
Table 14. Static characteristics: Power consumption in active and sleep mode
T
amb
=  40  C to +105  C, unless otherwise specified.1.71 V  V
DD
 3.6 V.
Symbol Parameter Conditions Min Typ
[1]
Max Unit
Active mode
I
DD
supply current CoreMark code executed from
SRAMX:
CCLK = 12 MHz
[2][3][4]
-3.0-mA
CCLK = 96 MHz
[2][3][4]
-16.0-mA
CCLK = 180 MHz
[3][4][5]
-35.0-mA
Sleep mode
I
DD
supply current CCLK = 12 MHz
[2][3][4]
-1.7-mA
CCLK = 96 MHz
[2][3][4]
-4.1-mA
CCLK = 180 MHz
[3][4][5]
-8.3-mA