Datasheet

LPC540xx All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet Rev. 1.8 — 22 June 2018 66 of 168
NXP Semiconductors
LPC540xx
32-bit ARM Cortex-M4 microcontroller
Table 8 shows the peripheral configuration in reduced power modes.
Table 8. Peripheral configuration in reduced power modes
Peripheral Reduced power mode
Sleep Deep-sleep Deep power-down
FRO Software configured Software configured Off
BOD Software configured Software configured Off
PLL Software configured Off Off
Watchdog osc and
WWDT
Software configured Software configured Off
Micro-tick Timer Software configured Software configured Off
DMA Active Configurable some for operations. Off
USART Software configured Off; but can create a wake-up interrupt in synchronous
slave mode or 32 kHz clock mode
Off
SPI Software configured Off; but can create a wake-up interrupt in slave mode Off
I2C Software configured Off; but can create a wake-up interrupt in slave mode Off
USB0 Software configured Software configured Off
USB1 Software configured Software configured Off
Ethernet Software configured Off Off
DMIC Software configured Software configured Off
Other digital peripherals Software configured Off Off
RTC oscillator Software configured Software configured Software configured