Datasheet

LPC540xx All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet Rev. 1.8 — 22 June 2018 64 of 168
NXP Semiconductors
LPC540xx
32-bit ARM Cortex-M4 microcontroller
Fig 12. LPC540xx clock generation (continued)
00
01
10
lcdclkin
main_clk
fro_hf
11
LCD CLOCK
DIVIDER
to LCD
(function clock)
LCDCLKDIV
LCDCLKSEL[1:0]
FRG CLOCK
DIVIDER
FRGCTRL[15:0]
aaa-029070
000
001
010
pll_clk
main_clk
fro_12m
011
fro_hf
111
“none”
FRG clock select
FRGCLKSEL[2:0]
000
001
010
fro_hf_div
fro_12m
audio_pll_clk
011
mclk_in
100
frg_clk
111
“none”
FCLKSEL[0-9]
fcn_fclk
(function clock
of Flexcomm[0-9])
CLKOUT
DIVIDER
CLKOUT
CLKOUTDIV
000
001
010
clk_in
main_clk
wdt_clk
011
fro_hf
100
pll_clk
101
usb_pll_clk
110
audio_pll_clk
111
32k_clk
CLKOUTSEL[2:0]
32k_clk
to CLK32K of all Flexcomms (fc0-fc9)
(1 per Flexcomm)
000
001
010
pll_clk
main_clk
011
fro_hf
111
audio_pll_clk
SCTimer/PWM
Clock Divider
to SCTimer/PWM
input clock 7
SCTCLKDIV
SCTCLKSEL[2:0]
“none”
“none”
(up to 11 Flexcomm
Interfaces on these
devices)
SCT clock select
LCD clock select
CLKOUT select
to MCAN0
function clock
CAN0CLKDIV
main_clk
MCAN0 clock
divider
to MCAN1
function clock
CAN1CLKDIV
main_clk
MCAN1 clock
divider
to Smartcard0
function clock
SC0CLKDIV
main_clk
Smartcard0
clock divider
to Smartcard1
function clock
SC1CLKDIV
main_clk
Smartcard1
clock divider
to ARM Trace
function clock
ARMTRACECLKDIV
main_clk
ARM Trace
clock divider
000
001
010
pll_clk
main_clk
usb_pll_clk
011
fro_hf
100
audio_pll_clk
SPIFI CLOCK
DIVIDER
to SPIFI
(function clock)
SPIFI CLKDIV
SPIFI clock select
SPIFICLKSEL[2:0]
111
“none”
Systick Clock
Divider
Systic clock select
SYSTICKCLKSEL[2:0]
main_clk
SYSTICKCLKDIV
000
001
010
wdt_clk
32k_clk
111
“none”
to Cortex-M4
System Tick
Timer
000
001
010
pll_clk
main_clk
usb_pll_clk
011
fro_hf
100
audio_pll_clk
111
“none”
FCLKSEL10
fcn_fclk
(function clock
of Flexcomm10)
011
fro_12