Datasheet

LPC540xx All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet Rev. 1.8 — 22 June 2018 49 of 168
NXP Semiconductors
LPC540xx
32-bit ARM Cortex-M4 microcontroller
PIO4_27 - - 85 -
[2]
PU; Z I/O PIO4_27 — General-purpose digital input/output pin.
O ENET_TX_EN — Ethernet transmit enable (RMII/MII
interface).
I/O SD_D[2] — SD/MMC data 2.
R — Reserved.
I/O FC1_SCK — Flexcomm 1: USART or SPI clock.
I CT1_CAP0 — Capture input 0 to Timer 1.
I/O EMC_D[22] — External Memory interface data [22].
PIO4_28 - - 92 -
[2]
PU; Z I/O PIO4_28 — General-purpose digital input/output pin.
O ENET_TX_ER — Ethernet Transmit Error (MII interface).
I/O SD_D[3] — SD/MMC data 3.
R — Reserved.
I/O FC1_RXD_SDA_MOSI — Flexcomm 1: USART receiver,
I2C data I/O, SPI master-out/slave-in data.
I CT1_CAP1 — Capture 1 input to Timer 1.
I/O EMC_D[23] — External Memory interface data [23].
PIO4_29 - - 102 -
[2]
PU; Z I/O PIO4_29 — General-purpose digital input/output pin.
I ENET_RX_ER — Ethernet receive error (RMII/MII
interface).
I/O SD_D[4] — SD/MMC data 4.
R — Reserved.
I/O FC1_TXD_SCL_MISO — Flexcomm 1: USART transmitter,
I2C clock, SPI master-in/slave-out data.
I CT1_CAP2 — Capture 2 input to Timer 1.
I/O EMC_D[24] — External Memory interface data [24].
PIO4_30 - - 80 -
[2]
PU; Z I/O PIO4_30 — General-purpose digital input/output pin.
I ENET_TX_CLK — Ethernet Transmit Clock (MII interface).
I/O SD_D[5] — SD/MMC data 5.
O CT3_MAT0 — Match output 0 from Timer 3.
I/O FC1_RTS_SCL_SSEL1 — Flexcomm 1: USART
request-to-send, I2C clock, SPI slave select 1.
I CT1_CAP3 — Capture 3 input to Timer 1.
I/O EMC_D[25] — External Memory interface data [25].
Table 4. Pin description
…continued
Symbol
100-pin, TFBGA 180-pin, TFBGA 208-pin, LQFP 100-pin, LQFP Reset state
[1]
[9]
Type
Description