Datasheet

LPC540xx All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet Rev. 1.8 — 22 June 2018 46 of 168
NXP Semiconductors
LPC540xx
32-bit ARM Cortex-M4 microcontroller
PIO4_14 - B5 194 -
[2]
PU; Z I/O PIO4_14 — General-purpose digital input/output pin.
I ENET_RX_CLK — Ethernet Receive Clock (MII interface)
or Ethernet Reference Clock (RMII interface).
O CT4_MAT1 — Match output 1 from Timer 4.
I/O FC9_SCK — Flexcomm 9: USART or SPI clock.
R — Reserved.
I SCT0_GPI7 — Pin input 7 to SCTimer/PWM.
PIO4_15 - A4 197 -
[2]
PU; Z I/O PIO4_15 — General-purpose digital input/output pin.
O ENET_MDC — Ethernet management data clock.
O CT4_MAT2 — Match output 2 from Timer 4.
I/O FC9_RXD_SDA_MOSI — Flexcomm 9: USART receiver,
I2C data I/O, SPI master-out/slave-in data.
PIO4_16 - C4 203 -
[2]
PU; Z I/O PIO4_16 — General-purpose digital input/output pin.
I/O ENET_MDIO — Ethernet management data I/O.
O CT4_MAT3 — Match output 3 from Timer 4.
I/O FC9_TXD_SCL_MISO — Flexcomm 9: USART transmitter,
I2C clock, SPI master-in/slave-out data.
PIO4_17 - - 6 -
[2]
PU; Z I/O PIO4_17 — General-purpose digital input/output pin.
R — Reserved.
O CAN1_TD — Transmitter output for CAN 1.
I CT1_CAP2 — Capture 2 input to Timer 1.
I UTICK_CAP0 — Micro-tick timer capture input 0.
R — Reserved.
O EMC_BLSN[2] — External memory interface byte lane
select 2 (active low).
PIO4_18 - - 10 -
[2]
PU; Z I/O PIO4_18 — General-purpose digital input/output pin.
R — Reserved.
I CAN1_RD — Receiver input for CAN 1.
I CT1_CAP3 — Capture 3 input to Timer 1.
I UTICK_CAP1 — Micro-tick timer capture input 1.
R — Reserved.
O EMC_BLSN[3] — External memory interface byte lane
select 3 (active low).
Table 4. Pin description
…continued
Symbol
100-pin, TFBGA 180-pin, TFBGA 208-pin, LQFP 100-pin, LQFP Reset state
[1]
[9]
Type
Description