Datasheet

LPC540xx All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet Rev. 1.8 — 22 June 2018 31 of 168
NXP Semiconductors
LPC540xx
32-bit ARM Cortex-M4 microcontroller
PIO2_0/
ADC0_7
-P357-
[4]
PU; Z I/O;
AI
PIO2_0/ADC0_7 — General-purpose digital input/output
pin. ADC input channel 7 if the DIGIMODE bit is set to 0 in
the IOCON register for this pin.
R — Reserved.
I/O FC0_RXD_SDA_MOSI — Flexcomm 0: USART receiver,
I2C data I/O, SPI master-out/slave-in data.
R — Reserved.
O CT1_CAP0 — Capture input 0 to Timer 1.
PIO2_1/
ADC0_8
-P458-
[4]
PU; Z I/O;
AI
PIO2_1/ADC0_8 — General-purpose digital input/output
pin. ADC input channel 8 if the DIGIMODE bit is set to 0 in
the IOCON register for this pin.
R — Reserved.
I/O FC0_TXD_SCL_MISO — Flexcomm 0: USART transmitter,
I2C clock, SPI master-in/slave-out data.
R — Reserved.
O CT1_MAT0 — Match output 0 from Timer 1.
PIO2_2 - C3 4 -
[2]
PU; Z I/O PIO2_2 — General-purpose digital input/output pin.
I ENET_CRS — Ethernet Carrier Sense (MII interface) or
Ethernet
Carrier Sense/Data Valid (RMII interface).
I/O FC3_SSEL3 — Flexcomm 3: SPI slave select 3.
O SCT0_OUT6 — SCTimer/PWM output 6.
O CT1_MAT1 — Match output 1 from Timer 1.
PIO2_3 - B1 7 -
[2]
PU; Z I/O PIO2_3 — General-purpose digital input/output pin.
O ENET_TXD2 — Ethernet transmit data 2 (MII interface).
O SD_CLK — SD/MMC clock.
I/O FC1_RXD_SDA_MOSI — Flexcomm 1: USART receiver,
I2C data I/O, SPI master-out/slave-in data.
O CT2_MAT0 — Match output 0 from Timer 2.
PIO2_4 - D3 9 -
[2]
PU; Z I/O PIO2_4 — General-purpose digital input/output pin.
O ENET_TXD3 — Ethernet transmit data 3 (MII interface).
I/O SD_CMD — SD/MMC card command I/O.
I/O FC1_TXD_SCL_MISO — Flexcomm 1: USART transmitter,
I2C clock, SPI master-in/slave-out data.
O CT2_MAT1 — Match output 1 from Timer 2.
Table 4. Pin description
…continued
Symbol
100-pin, TFBGA 180-pin, TFBGA 208-pin, LQFP 100-pin, LQFP Reset state
[1]
[9]
Type
Description