Datasheet

LPC540xx All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet Rev. 1.8 — 22 June 2018 25 of 168
NXP Semiconductors
LPC540xx
32-bit ARM Cortex-M4 microcontroller
PIO1_8 H5 P8 72 36
[2]
PU; Z I/O PIO1_8 — General-purpose digital input/output pin.
I/O FC0_CTS_SDA_SSEL0 — Flexcomm 0: USART
clear-to-send, I2C data I/O, SPI Slave Select 0.
O SD_CLK — SD/MMC clock.
R — Reserved.
O SCT0_OUT1 — SCTimer/PWM output 1.
I/O FC4_SSEL2 — Flexcomm 4: SPI slave select 2.
O EMC_A[7] — External memory interface address 7.
PIO1_9 K7 K6 78 39
[2]
PU; Z I/O PIO1_9 — General-purpose digital input/output pin.
O ENET_TXD0 — Ethernet transmit data 0.
I/O FC1_SCK — Flexcomm 1: USART or SPI clock.
I CT1_CAP0 — Capture 0 input to Timer 1.
O SCT0_OUT2 — SCTimer/PWM output 2.
I/O FC4_CTS_SDA_SSEL0 — Flexcomm 4: USART
clear-to-send, I2C data I/O, SPI Slave Select 0.
O EMC_CASN — External memory interface column access
strobe (active low).
PIO1_10 H6 N9 84 41
[2]
PU; Z I/O PIO1_10 — General-purpose digital input/output pin.
O ENET_TXD1 — Ethernet transmit data 1.
I/O FC1_RXD_SDA_MOSI — Flexcomm 1: USART receiver,
I2C data I/O, SPI master-out/slave-in data.
O CT1_MAT0 — Match output 0 from Timer 1.
O SCT0_OUT3 — SCTimer/PWM output 3.
R — Reserved.
O EMC_RASN — External memory interface row address
strobe (active low).
PIO1_11 B4 B4 198 94
[2][8]
PU; Z I/O PIO1_11 — General-purpose digital input/output pin.
O ENET_TX_EN — Ethernet transmit enable (RMII/MII
interface).
I/O FC1_TXD_SCL_MISO — Flexcomm 1: USART transmitter,
I2C clock, SPI master-in/slave-out data.
I CT1_CAP1 — Capture 1 input to Timer 1.
I USB0_VBUS — Monitors the presence of USB0 bus
power.
R — Reserved.
O EMC_CLK[0] — External memory interface clock 0.
Table 4. Pin description
…continued
Symbol
100-pin, TFBGA 180-pin, TFBGA 208-pin, LQFP 100-pin, LQFP Reset state
[1]
[9]
Type
Description