Datasheet

LPC540xx All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet Rev. 1.8 — 22 June 2018 163 of 168
NXP Semiconductors
LPC540xx
32-bit ARM Cortex-M4 microcontroller
18. Revision history
Table 58. Revision history
Document ID Release date Data sheet status Change notice Supersedes
LPC540xx v.1.8 20180622 Product data sheet - v.1.7
Modifications: Updated Figure 13Typical CoreMark score ((iterations/s)/MHz) vs. Frequency (MHz)
from SRAMX
Updated Table 4 “Pin description””: Description of VREFN and VSSA.
Updated Table 5 “Termination of unused pins: Added USB1_ID pin.
Updated Table 13 “CoreMark score, Typical values.
LPC540xx v.1.7 20180426 Product data sheet - v.1.6
Modifications:
Updated Table 4 “Pin description”: VREFN and VSSA.
LPC540xx v.1.6 20180417 Product data sheet - v.1.5
Modifications:
Added LPC54016JET100 TFBGA100 device.
Updated Table 22 “Dynamic characteristic: Typical wake-up times from low power
modes”: Changed t
wake
at typical for deep-sleep mode to 150 s. Was 19 s.
Updated Section 2 “Features and benefits”. Added text for full-speed USB crystal-less
software library: See Technical note TN00033 for more details.
LPC540xx v.1.5 20180227 Product data sheet - v.1.4
Modifications:
Updated Table 6 “Pin states in different power modes”: Added table note 3: If VBAT>
VDD, the external reset pin must be floating to prevent high leakage.
Updated Table 15 “Static characteristics: Power consumption in deep-sleep and deep
power-down modes”: 1.71 V £ V
DD
2.2 V. Added table note: At hot temperature and
below 2.0 V, the supply current increases slightly because of reduction of available
RBB (reverse body bias) voltage.
Updated Table 16 “Static characteristics: Power consumption in deep-sleep and deep
power-down modes”: 1.71 V £ V
DD
2.2 V.
Updated Table 17 “Static characteristics: Power consumption in deep power-down
mode”: Added table note 3: If VBAT> VDD, the external reset pin must be floating to
prevent high leakage.
Updated Figure 15 “Deep-sleep mode: Typical supply current IDD versus temperature
for different supply voltages VDD”: added remark: At hot temperature and below 2.0 V,
the supply current increases slightly because of reduction of available RBB (reverse
body bias) voltage.
Added Section 11.14 “SPI interfaces (Flexcomm Interface 10)”.
LPC540xx v.1.4 20180206 Product data sheet - v.1.3
Modifications:
Updated Figure 3 “LQFP100 package marking”.
LPC540xx v.1.3 20180126 Product data sheet - v.1.2