Datasheet

LPC540xx All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet Rev. 1.8 — 22 June 2018 132 of 168
NXP Semiconductors
LPC540xx
32-bit ARM Cortex-M4 microcontroller
11.19 SCTimer/PWM output timing
11.20 USB interface characteristics
[1] Characterized but not implemented as production test. Guaranteed by design.
Fig 36. USART timing
Un_SCLK (CLKPOL = 0)
TXD
RXD
T
cy(clk)
t
su(D)
t
h(D)
t
v(Q)
START BIT0
t
vQ)
Un_SCLK (CLKPOL = 1)
START
BIT0
BIT1
BIT1
aaa-015074
Table 46. SCTimer/PWM output dynamic characteristics
T
amb
=  40  C to 105  C; 1.71 V  V
DD
 3.6 V C
L
= 30 pF. Simulated skew (over process, voltage, and temperature) of any
two SCT fixed-pin output signals; sampled at the 90 % and 10 % level of the rising or falling edge; values guaranteed by
design.
Symbol Parameter Conditions Min Typ Max Unit
t
sk(o)
output skew time - 3.4 - 4.5 ns
Table 47. Dynamic characteristics: USB0 pins (full-speed)
C
L
= 50 pF; R
pu
= 1.5 k  on D+ to V
DD
, unless otherwise specified; 3.0 V  V
DD
 3.6 V.
Symbol Parameter Conditions Min Typ Max Unit
t
r
rise time 10 % to 90 % 4.0 20 ns
t
f
fall time 10 % to 90 % 4.0 20 ns
t
FRFM
differential rise and fall time matching t
r
/t
f
90 111.11 %
V
CRS
output signal crossover voltage 1.3 2.0 V
t
FEOPT
source SE0 interval of EOP see Figure 37 160 175 ns
t
FDEOP
source jitter for differential transition
to SE0 transition
see Figure 37 2+5ns
t
JR1
receiver jitter to next transition 18.5 +18.5 ns
t
JR2
receiver jitter for paired transitions 10 % to 90 % 9-+9ns
t
EOPR1
EOP width at receiver must reject as
EOP; see
Figure 37
[1]
40 - ns
t
EOPR2
EOP width at receiver must accept as
EOP; see
Figure 37
[1]
82 --ns