Datasheet

LPC540xx All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet Rev. 1.8 — 22 June 2018 130 of 168
NXP Semiconductors
LPC540xx
32-bit ARM Cortex-M4 microcontroller
11.16 DMIC subsystem
[1] Based on simulated values.
11.17 Smart card interface
[1] Based on simulated values. V
DD
= 2.7 V - 3.6 V.
Table 43. Dynamic characteristics
[1]
T
amb
=  40  C to 105  C; V
DD
= 2.7 V to 3.6 V; C
L
= 30 pF balanced loading on all pins; Input slew = 1 ns, SLEW set to
standard mode for all pins; Bypass bit = 0; Parameters sampled at the 90 % and 10 % level of the rising or falling edge.
Symbol Parameter Conditions Min Typ Max Unit
t
DS
data set-up time CCLK  100 MHz 14.3 - - ns
CCLK > 100 MHz 14.3 - - ns
t
DH
data hold time CCLK  100 MHz 0 - - ns
CCLK > 100 MHz 0 - - ns
Fig 35. DMIC timing diagram
aaa-017025
CLOCK
DATA
t
SU
t
DH
Table 44. Dynamic characteristics
[1]
T
amb
=  40  C to 105  C; V
DD
= 1.71 V to 3.6 V; C
L
= 30 pF balanced loading on all pins; Input slew = 1 ns, SLEW setting =
standard mode for all pins; Parameters sampled at the 90 % and 10 % level of the rising or falling edge.
Symbol Parameter Conditions Min Typ Max Unit
2.7 V  VDD  3.6 V
t
DS
data set-up time CCLK  100 MHz 2.1 - - ns
CCLK > 100 MHz 2.1 - - ns
t
DH
data hold time CCLK  100 MHz 0 - - ns
CCLK > 100 MHz 0 - - ns
t
v(Q)
data output valid time CCLK  100 MHz 11.0 - 22.5 ns
CCLK > 100 MHz 11.0 - 22.5 ns