Datasheet

LPC540xx All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2018. All rights reserved.
Product data sheet Rev. 1.8 — 22 June 2018 103 of 168
NXP Semiconductors
LPC540xx
32-bit ARM Cortex-M4 microcontroller
11.2 Wake-up process
[1] Typical ratings are not guaranteed. The values listed are at room temperature (25 C), nominal supply
voltages.
[2] The wake-up time measured is the time between when a GPIO input pin is triggered to wake the device up
from the low power modes and from when a GPIO output pin is set in the interrupt service routine (ISR)
wake-up handler.
[3] FRO enabled, all peripherals off. PLL disabled.
[4] RTC disabled. Wake up from deep power-down causes the part to go through entire reset
process. The wake-up time measured is the time between when the RESET
pin is triggered to wake the
device up and when a GPIO output pin is set in the reset handler.
[5] FRO disabled.
Table 22. Dynamic characteristic: Typical wake-up times from low power modes
V
DD
= 3.3 V;T
amb
=25  C; using FRO as the system clock.
Symbol Parameter Conditions Min Typ
[1]
Max Unit
t
wake
wake-up
time
from sleep mode
[2][3]
-2.0 -s
from deep-sleep mode; SRAMx
powered.
SRAM0, SRAM1, SRAM2,
SRAM3, and USB SRAM powered
down.
[2][5]
-150 -s
from deep power-down mode;
RTC disabled; using RESET
pin.
[4][5]
-1.2 -ms