Datasheet

NXP Semiconductors
KTPF4210EPEVBUG
KITPF4210EPEVB evaluation board
KTPF4210EPEVBUG All information provided in this document is subject to legal disclaimers. © NXP B.V. 2018. All rights reserved.
User guide Rev. 1.0 — 8 February 2018
7 / 18
4.3.2 Connector and terminal block definitions
Table 3. Terminal block definitions
Connector Function Pin definition
J8 SWBST Pin 1 - SWBST output
Pin 2 - GND
J10 SW1AB Pin 1 - SW1AB output
Pin 2 - GND
J11 SW1C Pin 1 - SW1C output
Pin 2 - GND
J12 SW2 Pin 1 - SW2 output
Pin 2 - GND
J13 SW4 Pin 1 - SW4 output
Pin 2 - GND
J14 SW3A Pin 1 - SW3A output
Pin 2 - GND
J15 SW3B Pin 1 - SW3B output
Pin 2 - GND
J16 VGEN1/VGEN2 Pin 1 - VGEN1 output
Pin 2 - GND
Pin 3 - VGEN2 output
J18 VGEN3/VGEN4 Pin 1 - VGEN3 output
Pin 2 - GND
Pin 3 - VGEN4 output
J19 VGEN5/VGEN6 Pin 1 - VGEN5 output
Pin 2 - GND
Pin 3 - VGEN6 output
J21 VSNVS/VREFDDR Pin 1 - VSNVS output
Pin 2 - GND
Pin 3 - VREFDDR output
J25 Main input supply Pin 1 - GND
Pin 2 - PVIN
Pin 3 - SWVIN
J29 Interfacing 1 Pin 1 - INTB
Pin 2 - SDWNB
Pin 3 - RESETBMCU
J32 Interfacing 2 Pin 1 - STANDBY
Pin 2 - PWRON
Pin 3 - GND
J31 I
2
C signals Pin 1 - SCL
Pin 2 - SDA
J33 VDDIO Pin 1 - VDDIO
Pin 2 - GND