Datasheet

NXP Semiconductors
KTPF4210EPEVBUG
KITPF4210EPEVB evaluation board
KTPF4210EPEVBUG All information provided in this document is subject to legal disclaimers. © NXP B.V. 2018. All rights reserved.
User guide Rev. 1.0 — 8 February 2018
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Figure 4. SW3A/B output configuration
Table 6. SW3A/B configuration chart
Component SW3A/B single phase SW3A/B dual phase SW3A independent
SW3B independent
R16 Closed DNP DNP
R17 Closed Closed DNP
R70 DNP Closed Closed
L7 1.0 µH
ISAT = 3.9 A
1.0 µH
ISAT = 3.0 A
1.0 µH
ISAT = 3.0 A
L8 N/A 1.0 µH
ISAT = 3.0 A
1.0 µH
ISAT = 3.0 A
4.3.3.3 LDO input supply source selection
Figure 5. LDO schematic configuration
Figure 6. Logic and core supplies