Datasheet

NXP Semiconductors
UM11193
KITFS85AEEVM evaluation board
UM11193 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2020. All rights reserved.
User manual Rev. 2.1 — 30 January 2019
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a
a
a
-
0
3
1
9
6
6
V
DBG
DBG
VSUP1/2
WAKE1
SPI/I2C
REGx
> V
SUP_UVH
> WAKE12
VIH
SPI/I2C OTP pgm
OFF PWR UP ON
SPI/I2C
Figure 10. Debug mode entry
Figure 11 shows the hardware kit implementation.
aaa-033242
SW1
SW2
VSUP1/2
FS8500
Debug
ref
OTP level
(DBG = 8 V)
2
1
3
VSUP
DBG_OTP
(8 V)
DBG VDDI2C
USB
VBAT
to KL25
DC/DC
P5V_USB
VSUP_5V
WAKE1
SW3
J24
Figure 11. OTP hardware implementation
4.3 Kit featured components
Figure 12 identifies important components on the board and Table 2 provides additional
details on these components.