Datasheet

NXP Semiconductors
UM11193
KITFS85AEEVM evaluation board
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section 'Legal information'.
© NXP B.V. 2020. All rights reserved.
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Date of release: 30 January 2019
Document identifier: UM11193
Contents
1 Introduction ......................................................... 2
2 Finding kit resources and information on
the NXP web site ................................................ 2
2.1 Collaborate in the NXP community ....................2
3 Getting ready .......................................................2
3.1 Kit contents ........................................................2
3.2 Additional hardware ........................................... 3
3.3 Windows PC workstation ...................................3
3.4 Software .............................................................3
4 Getting to know the hardware ........................... 3
4.1 Kit overview ....................................................... 3
4.1.1 KITFS85AEEVM features .................................. 4
4.1.2 VMON configuration .......................................... 4
4.1.3 VPRE compensation network ............................ 5
4.1.4 BUCK1 and BUCK2 multiphase
configuration ...................................................... 6
4.1.5 SPI/I2C ...............................................................6
4.1.6 VDDI2C ..............................................................7
4.2 Device OTP user configuration ..........................7
4.2.1 OTP and mirrors registers ................................. 8
4.2.2 OTP hardware implementation .......................... 8
4.3 Kit featured components ....................................9
4.3.1 FS8500/FS8400: Fail-safe system basis
chip with multiple SMPS and LDO ...................11
4.3.1.1 General description ..........................................11
4.3.1.2 Features ...........................................................11
4.3.2 Indicators ......................................................... 12
4.3.3 Connectors .......................................................13
4.3.3.1 VBAT connector (J1) ....................................... 13
4.3.3.2 Output power supply connectors ..................... 14
4.3.3.3 Debug connector (J29) .................................... 14
4.3.3.4 Program connector (J30) .................................15
4.3.4 Test points ....................................................... 15
4.3.5 Jumpers ........................................................... 17
4.3.6 Switches ...........................................................18
4.4 Schematic, board layout and bill of materials ... 19
5 Installing and configuring software and
tools ....................................................................19
5.1 Installing the Java JRE ....................................19
5.2 Installing Windows 7 FlexGUI driver ................19
5.3 Installing FlexGUI software package ............... 27
6 Configuring the hardware for startup ..............28
7 Using the KITFS85AEEVM evaluation board ...29
7.1 Generating the OTP configuration file ............. 29
7.2 Working in OTP emulation mode .....................31
7.2.1 Example script: Closing initialization phase,
disabling FCCU monitoring and releasing
FS0B ................................................................ 32
7.3 Programming the device with an OTP
configuration .................................................... 33
8 Using FlexGUI ................................................... 33
8.1 Starting the FlexGUI application ...................... 33
8.2 Establishing the connection between
FlexGUI and the hardware .............................. 34
8.3 Working with the Script editor ..........................36
8.3.1 Script text editor .............................................. 37
8.3.2 Script sequence files ....................................... 39
8.4 Understanding the FS85 workspace ................39
8.4.1 Register map ................................................... 39
8.4.2 Clocks .............................................................. 40
8.4.3 Regulators ........................................................41
8.4.4 Measurements ................................................. 41
8.4.5 Interrupt flags ...................................................42
8.4.6 INIT safety ....................................................... 43
8.4.7 Diag safety .......................................................43
8.4.8 OTP programming ........................................... 45
8.4.9 TestMode:Sequencer .......................................46
8.4.10 TestMode:Mirrors_Main and
TestMode:Mirrors_Failsafe .............................. 47
9 References ......................................................... 48
10 Revision history ................................................ 49
11 Legal information .............................................. 50