Datasheet

NXP Semiconductors

UM11193

KITFS85AEEVM evaluation board

User manual Rev. 2.1 — 30 January 2019

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• VMON2: assigned to EXT_MON2, (VMON bridge for 3.3 V input)

• VMON3: assigned to BUCK3, 2.3 V

• VMON4: assigned to EXT_MON4, (VMON bridge for 5.0 V input)

This configuration can be changed by installing appropriate bridge resistors. This board

was designed to sustain up to 10 A total on VPRE. Layout is done using six layer PCB

stack up.

The FS84/FS85 family can be evaluated with this board as it is populated with a superset

part. The FS84xx supports ASIL B design, while FS85xx supports ASIL D design.

An external LDO provides VDDI2C voltage with a choice of 1.8 V or 3.3 V (default).

VDDIO is assigned by default to VDDI2C. From USB voltage, an external DC/DC

generates the OTP programming voltage (8.0 V) without any need for an external power

supply.

4.1.1 KITFS85AEEVM features

• VBAT power supply connectors (Jack and Phoenix)

• VPRE output capability up to 6.0 A (external MOSFET)

• VBUCK1/2 in Standalone (default) or Multiphase mode

• VBUCK3 up to 3.6 A peak

• VBOOST 5.0 V or 5.74 V, up to 400 mA

• LDO1 and LDO2, from 1.1 V to 5.0 V, up to 400 mA

• Ignition key switch

• FS0B external safety pin

• Embedded USB connection for easy connection to software GUI (access to SPI/I2C

bus, IOs, RSTB, FS0B, INTB, Debug, MUX_OUT, regulators)

• LEDs that indicate signal or regulator status

• Support OTP fuse capabilities

• USB connection for register access, OTP emulation and programming

4.1.2 VMON configuration

The VMONx configuration is highly dependent on the use case. This kit is delivered with

a default configuration shown in Figure 2.

This configuration supports the following mapping:

• VPRE, assigned to VMON1; Bridge resistor set for 3.3 V

• BUCK2, assigned to VMON2; Bridge resistor set for 1.8 V

• BUCK3, assigned to VMON3; Bridge resistor set for 3.3 V

• LDO1, assigned to VMON4; Bridge resistor set for 3.3 V

• LDO2, assigned to VMON4; Bridge resistor set for 5.0 V

LDO1 and LDO2 use the same VMON, a reassignment is necessary to monitor both.

Due to the jumpers, VMONx can be tied to a 0.8 V to force a good voltage at pin level.

This behaves like hardware disabling and makes debug easy in some cases.