Datasheet

NXP Semiconductors
UM11193
KITFS85AEEVM evaluation board
UM11193 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2020. All rights reserved.
User manual Rev. 2.1 — 30 January 2019
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4.3.5 Jumpers
Figure 16. Evaluation board jumper locations
Table 12. Evaluation board jumper descriptions
Name Function Pin
number
Jumper/pin function
1−2 Shunt switch SW1 for current > 5.0 A
J5 VBAT shunt
3−4 Shunt switch SW1 for current > 5.0 A
1−2 For current measurement (insert amperemeter)
J6 VSUP shunt
3−4 For current measurement (insert amperemeter)
1−2 LDO1_IN connected to VPRE
J7 LDO1 input
2−3 LDO1_IN connected to VBOOST
1−2 VDDIO tied to LDO1
3−4 VDDIO tied to LDO2
5−6 VDDIO tied to VDDI2C (provided by external regulators)
7−8 VDDIO tied to BUCK3
J8 VDDIO selection
9−10 VDDIO tied to VDDIO external
J9 VBAT Jack Jack Used for VBAT supply using jack connector
1−2 BUCK_INQ tied to VPRE
J11 BUCK3 input
2−3 BUCK_INQ tied to VBOOST
1−2 VMON4 tied to LDO2
J20 VMON4
2−3 VMON4 tied to LDO1
1−2 VMON1 tied to 0.8 V
J21 VMON1
2−3 VMON1 tied to VPRE
1−2 VMON2 tied to 0.8 V
J22 VMON2
2−3 VMON2 tied to BUCK2
1−2 VMON3 tied to 0.8 V
J23 VMON3
2−3 VMON3 tied to BUCK3