Datasheet

NXP Semiconductors
UM11193
KITFS85AEEVM evaluation board
UM11193 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2020. All rights reserved.
User manual Rev. 2.1 — 30 January 2019
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Schematic label Signal name Description
J29-14 PSYNC Power synchronization
J29-15 VDDIO VDDIO used by FS85
J29-16 WAKE2_IN Wake2 input
J29-17 FCCU1 Fault collector control unit 1
J29-18 VSUP VSUP power supply
J29-19 FCCU2 Fault collector control unit 2
J29-20 GND Ground
4.3.3.4 Program connector (J30)
Table 10. Program connector (J30)
Schematic label Signal name Description
J30-1 WAKE1 WAKE1 input
J30-2 MOSI SPI master output slave input
J30-3 VDDI2C VDDI2C voltage
J30-4 MISO SPI master input slave output
J30-5 I2C_SDA I2C serial data
J30-6 SCLK SPI clock
J30-7 I2C_SCL I2C serial clock
J30-8 CSB SPI chip select
J30-9 VDDIO_EXT VDDIO supplied from external regulator
J30-10 VPRE VPRE output
J30-11 DBG Connected to Debug pin
J30-12 GND Ground
J30-13 n.c. not connected
J30-14 VSUP Connected to VSUP pin
J30-15 GND Ground
J30-16 GND Ground
4.3.4 Test points
The following test points provide access to various signals to and from the board.