Datasheet

Electrical Characteristics
i.MX 6DualPlus/6QuadPlus Automotive Applications Processors, Rev. 3, 11/2018
NXP Semiconductors 93
4.12.9 I
2
C Module Timing Parameters
This section describes the timing parameters of the I
2
C module. Figure 58 depicts the timing of I
2
C
module, and Table 61 lists the I
2
C module timing characteristics.
Figure 58. I
2
C Bus Timing
t
F
Differential output signal fall time 20–80%
RL = 50 Ω
See Figure 57.
75 — 0.4 UI ps
— Differential signal overshoot
Referred to 2x V
SWING
——15%
— Differential signal undershoot Referred to 2x V
SWING
——25%
Data and Control Interface Specifications
t
Power-up
2
HDMI 3D Tx PHY power-up time From power-down to
HSI_TX_READY assertion
— — 3.35 ms
1
Relative to ideal recovery clock, as specified in the HDMI specification, version 1.4a, section 4.2.3.
2
For information about latencies and associated timings, see Section 4.12.7.1, “Latencies and Timing Information.”
Table 61. I
2
C Module Timing Parameters
ID Parameter
Standard Mode Fast Mode
Unit
Min Max Min Max
IC1 I2Cx_SCL cycle time 10 — 2.5 —
µs
IC2 Hold time (repeated) START condition 4.0 — 0.6 — µs
IC3 Set-up time for STOP condition 4.0 — 0.6 — µs
IC4 Data hold time 0
1
3.45
2
0
1
0.9
2
µs
IC5 HIGH Period of I2Cx_SCL Clock 4.0 — 0.6 — µs
IC6 LOW Period of the I2Cx_SCL Clock 4.7 — 1.3 — µs
IC7 Set-up time for a repeated START condition 4.7 — 0.6 — µs
IC8 Data set-up time 250 — 100
3
—ns
Table 60. Switching Characteristics (continued)
Symbol Parameter Conditions Min Typ Max Unit
IC10
IC11
IC9
IC2
IC8
IC4
IC7
IC3
IC6
IC10
IC5
IC11
START
STOP START
START
I2Cx_SDA
I2Cx_SCL
IC1