Datasheet

i.MX 6DualPlus/6QuadPlus Automotive Applications Processors, Rev. 3, 11/2018
62 NXP Semiconductors
Electrical Characteristics
Figure 23. DTACK Mode Write Access (DAP=0)
Table 42. EIM Asynchronous Timing Parameters Relative to Chip Select
1
,
2
Ref No. Parameter
Determination by Synchronous
measured parameters
Min Max Unit
WE31 EIM_CSx_B valid to Address Valid WE4-WE6-CSA×t-3.5-CSA×t3.5-CSA×tns
WE32 Address Invalid to EIM_CSx_B
Invalid
WE7-WE5-CSN× t-3.5-CSN×t3.5-CSN×tns
WE32A
(muxed
A/D)
EIM_CSx_B valid to Address
Invalid
t+WE4-WE7+
(ADVN+ADVA+1-CSA)×t
t-3.5+(ADVN+A
DVA+1-CSA)×t
t+3.5+(ADVN+ADVA+
1-CSA)×t
ns
WE33 EIM_CSx_B Valid to EIM_WE_B
Valid
WE8-WE6+(WEA-WCSA)×t-3.5+(WEA-WCS
A)×t
3.5+(WEA-WCSA)×tns
WE34 EIM_WE_B Invalid to EIM_CSx_B
Invalid
WE7-WE9+(WEN-WCSN)×t -3.5+(WEN-WCS
N)×t
3.5+(WEN-WCSN)×tns
WE35 EIM_CSx_B Valid to EIM_OE_B
Valid
WE10- WE6+(OEA-RCSA)×t -3.5+(OEA-RCS
A)×t
3.5+(OEA-RCSA)×tns
WE35A
(muxed
A/D)
EIM_CSx_B Valid to EIM_OE_B
Valid
WE10-WE6+(OEA+RADVN+R
ADVA+ADH+1-RCSA)×t
-3.5+(OEA+RAD
VN+RADVA+ADH
+1-RCSA)×t
3.5+(OEA+RADVN+RA
DVA+ADH+1-RCSA)×t
ns
WE36 EIM_OE_B Invalid to EIM_CSx_B
Invalid
WE7-WE11+(OEN-RCSN)×t -3.5+(OEN-RCS
N)×t
3.5+(OEN-RCSN)×
tns
WE37 EIM_CSx_B Valid to EIM_EBx_B
Valid (Read access)
WE12-WE6+(RBEA-RCSA)× t -3.5+(RBEA- RC
SA)×t
3.5+(RBEA - RCSA)×tns
WE38 EIM_EBx_B Invalid to
EIM_CSx_B Invalid (Read access)
WE7-WE13+(RBEN-RCSN)×t-3.5+
(RBEN-RCSN)×t
3.5+(RBEN-RCSN)×tns
WE39 EIM_CSx_B Valid to EIM_LBA_B
Valid
WE14-WE6+(ADVA-CSA)×t-3.5+
(ADVA-CSA)×t
3.5+(ADVA-CSA)×tns
Last Valid Address Address V1
D(V1)
EIM_ADDRxx
EIM_DATAxx
EIM_WE_B
EIM_LBA_B
EIM_OE_B
EIM_EBx_B
EIM_CSx_B
Next Address
WE31
WE39
WE33
WE45
WE32
WE40
WE34
WE46
WE42
WE41
EIM_DTACK_B
WE47
WE48