Datasheet

i.MX 6Dual/6Quad Automotive and Infotainment Applications Processors, Rev. 6, 11/2018
88 NXP Semiconductors
Electrical Characteristics
Figure 48. RGMII Receive Signal Timing Diagram Original
Figure 49. RGMII Receive Signal Timing Diagram with Internal Delay
4.12.6 Flexible Controller Area Network (FlexCAN) AC Electrical
Specifications
The Flexible Controller Area Network (FlexCAN) module is a communication controller implementing
the CAN protocol according to the CAN 2.0B protocol specification.The processor has two CAN modules
available for systems design. Tx and Rx ports for both modules are multiplexed with other I/O pins. See
the IOMUXC chapter of the i.MX 6Dual/6Quad reference manual (IMX6DQRM) to see which pins
expose Tx and Rx pins; these ports are named FLEXCAN_TX and FLEXCAN_RX, respectively.
4.12.7 HDMI Module Timing Parameters
4.12.7.1 Latencies and Timing Information
Power-up time (time between TX_PWRON assertion and TX_READY assertion) for the HDMI 3D Tx
PHY while operating with the slowest input reference clock supported (13.5 MHz) is 3.35 ms.