Datasheet

i.MX 6Dual/6Quad Automotive and Infotainment Applications Processors, Rev. 6, 11/2018
80 NXP Semiconductors
Electrical Characteristics
4.12.4 Ultra High Speed SD/SDIO/MMC Host Interface (uSDHC)
AC Timing
This section describes the electrical information of the uSDHC, which includes SD/eMMC4.3 (Single
Data Rate) timing and eMMC4.4/4.1 (Dual Date Rate) timing.
4.12.4.1 SD/eMMC4.3 (Single Data Rate) AC Timing
Figure 39 depicts the timing of SD/eMMC4.3, and Table 50 lists the SD/eMMC4.3 timing characteristics.
Figure 39. SD/eMMC4.3 Timing
Table 50. SD/eMMC4.3 Interface Timing Specification
ID Parameter Symbols Min Max Unit
Card Input Clock
SD1 Clock Frequency (Low Speed) f
PP
1
0400kHz
Clock Frequency (SD/SDIO Full Speed/High Speed) f
PP
2
0 25/50 MHz
Clock Frequency (MMC Full Speed/High Speed) f
PP
3
0 20/52 MHz
Clock Frequency (Identification Mode) f
OD
100 400 kHz
SD2 Clock Low Time t
WL
7—ns
SD3 Clock High Time t
WH
7—ns
SD4 Clock Rise Time t
TLH
—3ns
SD5 Clock Fall Time t
THL
—3ns
eSDHC Output/Card Inputs SD_CMD, SD_DATAx (Reference to SDx_CLK)
SD6 eSDHC Output Delay t
OD
–6.6 3.6 ns
SD1
SD3
SD5
SD4
SD7
SDx_CLK
SD2
SD8
SD6
Output from uSDHC to card
Input from card to uSDHC
SDx_DATA[7:0]
SDx_DATA[7:0]