Datasheet

Electrical Characteristics
i.MX 6Dual/6Quad Automotive and Infotainment Applications Processors, Rev. 6, 11/2018
NXP Semiconductors 117
Common-mode output voltage:
(V
O+
- V
O-
) / 2
V
OCM
—1.01.5V
Difference in common-mode output between
(high/low) steady-states:
I V
OCM, high
- V
OCM, low
I
ΔV
OCM
— -50 50 mV
Variations on common-mode output during a
logic state transitions
V
CMV
See Note
2
—150mVpp
Short circuit current |I
OS
| See Note
3
—43mA
Differential output impedance Z
O
—1.6—kΩ
Receiver Characteristics
Differential clock input:
• logic low steady-state
• logic high steady-state
• hysteresis
V
ILC
V
IHC
V
HSC
See Note
4
50
-25
-50
25
mV
mV
mV
Differential signal/data input:
• logic low steady-state
• logic high steady-state
V
ILS
V
IHS
—
—
50
-50
—
mV
mV
Signal-ended input voltage (steady-state):
• MLB_SIG_P, MLB_DATA_P
• MLB_SIG_N, MLB_DATA_N V
IN+
V
IN-
—
0.5
0.5
2.0
2.0
V
V
1
The signal-ended output voltage of a driver is defined as V
O+
on MLB_CLK_P, MLB_SIG_P, and MLB_DATA_P. The
signal-ended output voltage of a driver is defined as V
O-
on MLB_CLK_N, MLB_SIG_N, and MLB_DATA_N.
2
Variations in the common-mode voltage can occur between logic states (for example, during state transitions) as a result of
differences in the transition rate of V
O+
and V
O-
.
3
Short circuit current is applicable when V
O+
and V
O-
are shorted together and/or shorted to ground.
4
The logic state of the receiver is undefined when -50 mV < V
ID
< 50 mV.
Table 72. MediaLB 6-Pin Interface Electrical DC Specifications (continued)
Parameter Symbol Test Conditions Min Max Unit