Datasheet

January 1995 4
Philips Semiconductors Product specification
8-bit static shift register
HEF4021B
MSI
FUNCTION TABLES
Serial operation
INPUTS OUTPUTS
nCPD
S
PL O
5
O
6
O
7
1D
1
LXXX
2D
2
LXXX
3D
3
LXXX
6XLD
1
XX
7XLD
2
D
1
X
8XLD
3
D
2
D
1
X L no change
Parallel operation
Notes
1. H = HIGH state (the more positive voltage)
L = LOW state (the less positive voltage)
X = state is immaterial
= positive-going transition
= negative-going transition
D
n
= either HIGH or LOW
n = number of clock pulse transitions
INPUTS OUTPUTS
nCPD
S
PL O
5
O
6
O
7
XXHP
5
P
6
P
7
AC CHARACTERISTICS
V
SS
= 0 V; T
amb
=25°C; C
L
= 50 pF; input transition times ≤ 20 ns
V
DD
V
SYMBOL MIN. TYP. MAX.
TYPICAL EXTRAPOLATION
FORMULA
Propagation delays
CP → O
n
5 125 250 ns 98 ns + (0,55 ns/pF) C
L
HIGH to LOW 10 t
PHL
55 110 ns 44 ns + (0,23 ns/pF) C
L
15 40 80 ns 32 ns + (0,16 ns/pF) C
L
5 115 230 ns 88 ns + (0,55 ns/pF) C
L
LOW to HIGH 10 t
PLH
50 100 ns 39 ns + (0,23 ns/pF) C
L
15 40 80 ns 32 ns + (0,16 ns/pF) C
L
PL → O
n
5 120 240 ns 93 ns + (0,55 ns/pF) C
L
HIGH to LOW 10 t
PHL
55 110 ns 44 ns + (0,23 ns/pF) C
L
15 40 80 ns 32 ns + (0,16 ns/pF) C
L
5 105 210 ns 78 ns + (0,55 ns/pF) C
L
LOW to HIGH 10 t
PLH
50 100 ns 39 ns + (0,23 ns/pF) C
L
15 40 80 ns 32 ns + (0,16 ns/pF) C
L
Output transition 5 60 120 ns 10 ns + (1,0 ns/pF) C
L
times 10 t
THL
30 60 ns 9 ns + (0,42 ns/pF) C
L
HIGH to LOW 15 20 40 ns 6 ns + (0,28 ns/pF) C
L
5 60 120 ns 10 ns + (1,0 ns/pF) C
L
LOW to HIGH 10 t
TLH
30 60 ns 9 ns + (0,42 ns/pF) C
L
15 20 40 ns 6 ns + (0,28 ns/pF) C
L