Datasheet
HEF4017B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 8 — 18 November 2011 8 of 18
NXP Semiconductors
HEF4017B
5-stage Johnson decade counter
[1] The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (C
L
in pF).
[2] t
t
is the same as t
THL
and t
TLH
.
t
PLH
LOW to HIGH
propagation delay
CP0, CP1 Q0 to Q9;
see Figure 7
5 V 98 ns + (0.55 ns/pF)C
L
- 125 250 ns
10 V 39 ns + (0.23 ns/pF)C
L
- 50 100 ns
15 V 32 ns + (0.16 ns/pF)C
L
-4080ns
CP0, CP
1 Q5-9;
see Figure 7
5 V 98 ns + (0.55 ns/pF)C
L
- 125 250 ns
10 V 39 ns + (0.23 ns/pF)C
L
- 50 100 ns
15 V 32 ns + (0.16 ns/pF)C
L
-4080ns
MR Q
5-9;
see Figure 8
5 V 83 ns + (0.55 ns/pF)C
L
- 110 220 ns
10 V 34 ns + (0.23 ns/pF)C
L
-4590ns
15 V 27 ns + (0.16 ns/pF)C
L
-3570ns
MR Q0;
see Figure 8
5 V 103 ns + (0.55 ns/pF)C
L
- 130 260 ns
10 V 44 ns + (0.23 ns/pF)C
L
- 55 105 ns
15 V 32 ns + (0.16 ns/pF)C
L
-4075ns
t
t
transition time see Figure 7 5V
[2]
10 ns + (1.00 ns/pF)C
L
- 60 120 ns
10 V 9 ns + (0.42 ns/pF)C
L
-3060ns
15 V 6 ns + (0.28 ns/pF)C
L
-2040ns
t
h
hold time CP0 CP1;
see Figure 9
5 V 90 45 - ns
10 V 40 20 - ns
15 V 20 10 - ns
CP
1 CP0;
see Figure 9
5 V 80 40 - ns
10 V 40 20 - ns
15 V 30 10 - ns
t
W
pulse width CP0 input LOW;
minimum width;
see Figure 8
5 V 80 40 - ns
10 V 40 20 - ns
15 V 30 15 - ns
CP
1 input HIGH;
minimum width;
see Figure 8
5 V 80 40 - ns
10 V 40 20 - ns
15 V 30 15 - ns
MR input HIGH;
minimum width;
see Figure 8
5 V 50 25 - ns
10 V 30 15 - ns
15 V 20 10 - ns
t
rec
recovery time MR input;
see Figure 8
5 V 60 30 - ns
10 V 30 15 - ns
15 V 20 10 - ns
f
max
maximum
frequency
see Figure 8 5V 6 12 - MHz
10 V 12 30 - MHz
15 V 15 30 - MHz
Table 7. Dynamic characteristics
…continued
T
amb
= 25
C; V
SS
= 0 V; for test circuit see Figure 10
Symbol Parameter Conditions V
DD
Extrapolation formula
[1]
Min Typ Max Unit