Datasheet

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1. General description

The HEF4017B is a 5-stage Johnson decade counter with ten spike-free decoded active

HIGH outputs (Q0 to Q9), an active LOW carry output from the most significant flip-flop

5-9), active HIGH and active LOW clock inputs (CP0, CP1) and an overriding

asynchronous master reset input (MR).

The counter is advanced by either a LOW-to-HIGH transition at CP0 while CP

1 is LOW or

a HIGH-to-LOW transition at CP

1 while CP0 is HIGH (see Table 3).

When cascading counters, the Q

5-9 output, which is LOW while the counter is in states 5,

6, 7, 8, and 9, can be used to drive the CP0 input of the next counter. A HIGH on MR

resets the counter to zero (Q0 = Q

5-9 = HIGH; Q1 to Q9 = LOW) independent of the clock

inputs (CP0, CP

1).

Automatic counter code correction is provided by an internal circuit: following any illegal

code the counter returns to a proper counting mode within 11 clock pulses.

Schmitt trigger action makes the clock inputs highly tolerant of slower rise and fall times.

It operates over a recommended V

power supply range of 3 V to 15 V referenced to V

(usually ground). Unused inputs must be connected to V

, V

, or another input.

2. Features and benefits

 Automatic counter correction

 Tolerant of slow clock rise and fall times

 Fully static operation

 5 V, 10 V, and 15 V parametric ratings

 Standardized symmetrical output characteristics

 Specified from 40 C to +125 C

 Complies with JEDEC standard JESD 13-B

3. Ordering information

HEF4017B

5-stage Johnson decade counter

Rev. 8 — 18 November 2011 Product data sheet

Table 1. Ordering information

All types operate from





C to +125



Type number Package

Name Description Version

HEF4017BP DIP16 plastic dual in-line package; 16 leads (300 mil) SOT38-4

HEF4017BT SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1

Summary of content (18 pages)

PAGE 1
HEF4017B 5-stage Johnson decade counter Rev. 8 — 18 November 2011 Product data sheet 1. General description The HEF4017B is a 5-stage Johnson decade counter with ten spike-free decoded active HIGH outputs (Q0 to Q9), an active LOW carry output from the most significant flip-flop (Q5-9), active HIGH and active LOW clock inputs (CP0, CP1) and an overriding asynchronous master reset input (MR).
PAGE 2
HEF4017B NXP Semiconductors 5-stage Johnson decade counter 4. Functional diagram 13 14 15 CP1 CP0 5-STAGE JOHNSON COUNTER MR Q5-9 DECODING AND OUTPUT CIRCUITRY 12 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9 3 Fig 1. 2 4 7 10 1 5 6 9 11 001aah242 Q FF 4 CP Q RD D Functional diagram Q FF 1 CP Q RD Q FF 2 CP Q RD D CP1 CP0 Q FF 3 CP Q RD D D Q FF 5 CP Q RD D MR Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q5-9 001aah243 Fig 2.
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HEF4017B NXP Semiconductors 5-stage Johnson decade counter CTRDIV10/DEC 14 13 14 CP1 CP0 15 MR 3 Q1 2 Q2 4 Q3 7 3 Q4 10 4 Q5 1 5 Q6 5 6 Q7 6 7 Q8 9 8 Q9 11 9 Q5-9 12 CT≥5 13 15 & 1 CT = 0 2 3 2 4 7 10 1 5 6 9 11 12 001aah240 001aah239 Fig 3. 0 Q0 Logic symbol Fig 4. IEE logic symbol 5. Pinning information 5.
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HEF4017B NXP Semiconductors 5-stage Johnson decade counter Table 2. Pin description …continued Symbol Pin Description CP0 14 clock input (LOW-to-HIGH edge-triggered) MR 15 master reset input VDD 16 supply voltage 6. Functional description Table 3.
PAGE 5
HEF4017B NXP Semiconductors 5-stage Johnson decade counter CP0 INPUT CP1 INPUT MR INPUT Q0 OUTPUT Q1 OUTPUT Q2 OUTPUT Q3 OUTPUT Q4 OUTPUT Q5 OUTPUT Q6 OUTPUT Q7 OUTPUT Q8 OUTPUT Q9 OUTPUT Q5-9 OUTPUT Fig 6. 001aah244 Timing diagram 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134).
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HEF4017B NXP Semiconductors 5-stage Johnson decade counter Table 4. Limiting values …continued In accordance with the Absolute Maximum Rating System (IEC 60134).
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HEF4017B NXP Semiconductors 5-stage Johnson decade counter Table 6. Static characteristics …continued VSS = 0 V; VI = VSS or VDD unless otherwise specified. Symbol Parameter IOH IOL Conditions Tamb = 25 C Tamb = 85 C Tamb = 125 C Unit Min Max Min Max Min Max Min Max HIGH-level VO = 2.5 V output current V = 4.6 V O 5V - 1.7 - 1.4 - 1.1 - 1.1 5V - 0.64 - 0.5 - 0.36 - 0.36 mA VO = 9.5 V 10 V - 1.6 - 1.3 - 0.9 - 0.9 mA VO = 13.5 V 15 V - 4.
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HEF4017B NXP Semiconductors 5-stage Johnson decade counter Table 7.
PAGE 9
HEF4017B NXP Semiconductors 5-stage Johnson decade counter Table 8. Dynamic power dissipation PD PD can be calculated from the formulas shown. VSS = 0 V; tr = tf  20 ns; Tamb = 25 C.
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HEF4017B NXP Semiconductors 5-stage Johnson decade counter 1/f max tW VI CP0 input VM VSS 1/f max VI CP1 input VM VSS tW trec VI MR input VM VSS tW VOH Q1 - Q9 output VM VOL tPHL VOH Q0, Q5 - Q9 output VOL VM 001aaj306 tPLH Conditions: CP1 = LOW, while CP0 triggers on a LOW-to-HIGH transition, tW and trec are measured when CP0 = HIGH and CP1 triggers on a HIGH-to-LOW transition. The shaded areas indicate where the output state is set by the input count. Measurement points given in Table 9.
PAGE 11
HEF4017B NXP Semiconductors 5-stage Johnson decade counter tW VI 90 % 90 % negative pulse VM VM 10 % 0V 10 % tf tr tr tf VI 90 % positive pulse 90 % VM VM 10 % 0V 10 % tW 001aaj781 a. Input waveforms VDD VI VO G DUT CL RT 001aag182 b. Test circuit Test data is given in Table 10.
PAGE 12
HEF4017B NXP Semiconductors 5-stage Johnson decade counter CP0 MR CP0 HEF4017B CP1 Q0 Q1- - - - Q8 Q9 clock MR HEF4017B CP1 Q0 Q1- - - - Q8 Q9 CP0 MR HEF4017B CP1 Q1 - - - - - - Q8 Q9 9 decoded outputs 8 decoded outputs 8 decoded outputs first stage intermediate stages last stage 001aae577 Enabling the counter on CP1 when CP0 is HIGH, or on CP0 when CP1 is LOW, causes an extra count. Fig 11.
PAGE 13
HEF4017B NXP Semiconductors 5-stage Johnson decade counter 13. Package outline DIP16: plastic dual in-line package; 16 leads (300 mil) SOT38-4 ME seating plane D A2 A A1 L c e Z w M b1 (e 1) b b2 MH 9 16 pin 1 index E 1 8 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 min. A2 max. b b1 b2 c D (1) E (1) e e1 L ME MH w Z (1) max. mm 4.2 0.51 3.2 1.73 1.30 0.53 0.38 1.25 0.85 0.36 0.23 19.50 18.55 6.
PAGE 14
HEF4017B NXP Semiconductors 5-stage Johnson decade counter SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 D E A X c y HE v M A Z 16 9 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 8 e 0 detail X w M bp 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.8 1.27 6.2 5.8 1.
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HEF4017B NXP Semiconductors 5-stage Johnson decade counter 14. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes HEF4017B v.8 20111118 Product data sheet - HEF4017B v.7 Modifications: • • • Legal pages updated. Changes in “General description” and “Features and benefits”. Section “Applications” removed. HEF4017B v.7 20110914 Product data sheet - HEF4017B v.6 HEF4017B v.6 20091105 Product data sheet - HEF4017B v.
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HEF4017B NXP Semiconductors 5-stage Johnson decade counter 15. Legal information 15.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.
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HEF4017B NXP Semiconductors 5-stage Johnson decade counter Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications.
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HEF4017B NXP Semiconductors 5-stage Johnson decade counter 17. Contents 1 2 3 4 5 5.1 5.2 6 7 8 9 10 11 12 13 14 15 15.1 15.2 15.3 15.4 16 17 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . .