Datasheet

NXP Semiconductors

KTFRDMPF1550EVMUG

FRDM-PF1550EVM evaluation board

User guide Rev. 2.0 — 7 March 2018

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5.4.2 Jumper and switch definitions

Figure 3 shows the location of jumpers and switches on the evaluation board.

Figure 3. Jumper and switch locations

Table 5 describes the function and settings for each jumper and switch.

Table 5. Jumper and switch definitions

Jumper/Switch Description Setting Connection/Result

S1 ONKEY Open Connects ONKEY pin to GND when

pressed. Causes wake-up event if

configured properly.

S2 PWRON Open Connects PWRON pin to GND when

pressed. Resets the PMIC device.

J3 5V USB Power supply for the board (J12 shall be

opened)

[1-2] Pullup to VSNVSJ4 Pullup configuration

[2-3] Pullup to VDDIO which is supplied by P3V3

coming from the Freedom board

Pin 1 Negative pole of batteryJ7 Battery connection

Do not short together

Pin 2 Positive pole of battery

J11 Thermistor

connection

Thermistor

connected

Connect NTC thermistor

(10 kOhm at 25 °C, example,

NXRT15XH103FA1B040)

Open 5V from the J3 (USB) is usedJ12 5V power supply

[1-2] 5V is used from the Freedom board (current

is limited)

Pin 1 Negative pole of batteryJ92 Battery connection

Do not short together

Pin 2 Positive pole of battery

5.4.3 Test point definitions

The following test points provide access to various signals to and from the board.