Datasheet

NXP Semiconductors
KTFRDMPF1550EVMUG
FRDM-PF1550EVM evaluation board
KTFRDMPF1550EVMUG All information provided in this document is subject to legal disclaimers. © NXP B.V. 2018. All rights reserved.
User guide Rev. 2.0 — 7 March 2018
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Register Pre-programmed OTP configuration – A4
configuration
OTP_SWx_EN_AND_STBY_EN SW1, SW2, SW3 enabled in RUN and STANDBY
OTP_LDOx_EN_AND_STBY_EN LDO1, LDO2, LDO3, VREFDDR enabled in RUN and
STANDBY
OTP_PWRON_CFG Level sensitive
OTP_SEQ_CLK_SPEED 2 ms time slots
OTP_TGRESET[1:0] 4 secs Global reset timer
OTP_POR_DLY[2:0] 2 ms RESETBMCU power up delay
OTP_UVDET[1:0] Rising 3.0 V; falling 2.9 V
OTP_I2C_DEGLITCH_EN I
2
C Deglitch filter disabled
OTP_CHGR_OPER[1:0] Charger = ON,
Linear = ON
OTP_CHGR_TPRECHG Pre-charge timer = 30 minutes
OTP_CHGR_EOCTIME[2:0] End-of-charge debounce = 16 secs
OTP_CHGR_FCHGTIME[2:0] Fast-charge timer disabled
OTP_CHGR_EOC_MODE Linear ON in the DONE state
OTP_CHGR_CHG_RESTART[1:0] 100 mV below CHGCV
OTP_CHGR_CHG_CC[4:0] CC = 500 mA
OTP_CHGR_MINVSYS[1:0] VSYSMIN = 4.3 V
OTP_CHGR_CHGCV[5:0] CV = 4.2 V
OTP_CHGR_VBUS_LIN_ILIM[4:0] VBUS ILIM = 1500 mA
OTP_CHGR_VBUS_DPM_REG[2:0] 4.5 V
OTP_CHGR_USBPHYLDO USBPHY LDO enabled
OTP_CHGR_USBPHY USBPHY = 3.3 V
OTP_CHGR_ACTDISPHY USBPHY active discharge enabled