Datasheet

NXP Semiconductors
KTFRDMPF1550EVMUG
FRDM-PF1550EVM evaluation board
KTFRDMPF1550EVMUG All information provided in this document is subject to legal disclaimers. © NXP B.V. 2018. All rights reserved.
User guide Rev. 2.0 — 7 March 2018
33 / 34
Tables
Tab. 1. Device features ................................................. 5
Tab. 2. Startup configuration ......................................... 5
Tab. 3. Board description .............................................. 7
Tab. 4. LED locations .................................................... 8
Tab. 5. Jumper and switch definitions ...........................9
Tab. 6. Test point definitions ....................................... 10
Tab. 7. FRDM-PF1550EVM to FRDM-KL25Z
connections ..................................................... 12
Figures
Fig. 1. Board description .............................................. 7
Fig. 2. LED locations .................................................... 8
Fig. 3. Jumper and switch locations ............................. 9
Fig. 4. Test point locations ......................................... 10
Fig. 5. Connecting FRDM-KL25Z to FRDM-
PF1550EVM .................................................... 12
Fig. 6. Hardware configuration ................................... 15
Fig. 7. GUI components ............................................. 18
Fig. 8. GUI startup ......................................................19
Fig. 9. GUI connected to the target board ..................19
Fig. 10. Switching Supplies panel ................................ 20
Fig. 11. Linear Supplies panel ......................................21
Fig. 12. Charger panel ................................................. 22
Fig. 13. OTP Configuration panel .................................23
Fig. 14. Miscellaneous panel ........................................24
Fig. 15. Interrupts panel ............................................... 24
Fig. 16. Script Editor panel ...........................................26
Fig. 17. Charge Plot panel ........................................... 27
Fig. 18. Discharge Plot panel .......................................28
Fig. 19. Functional Registers panel ..............................29
Fig. 20. OTP Registers panel .......................................29