Datasheet
NXP Semiconductors
KTFRDMPF1550EVMUG
FRDM-PF1550EVM evaluation board
KTFRDMPF1550EVMUG All information provided in this document is subject to legal disclaimers. © NXP B.V. 2018. All rights reserved.
User guide Rev. 2.0 — 7 March 2018
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FRDM-PF1550EVM FRDM-KL25Z Pin hardware name
Header Pin Header Pin FRDM-PF1550EVM FRDM-KL25Z
Description
J1 10 J1 10 MUX_RESETB PTA4 Multiplexer reset
J1 11 J1 11 N/C PTC6 No connection
J1 12 J1 12 VDDIO PTA5 VDDIO Power Supply
J1 13 J1 13 N/C PTC10 No connection
J1 14 J1 14 SCL2 PTC8 Clock signal of the
I
2
C-bus (for additional
ICs)
J1 15 J1 15 N/C PTC11 No connection
J1 16 J1 16 SDA2 PTC9 Data signal of the I
2
C-
bus (for additional
ICs)
J2 1 J2 1 N/C PTC12 No connection
J2 2 J2 2 PWRON PTA13 PWRON input
J2 3 J2 3 N/C PTC13 No connection
J2 4 J2 4 STANDBY PTD5 STANDBY input
J2 5 J2 5 N/C PTC16 No connection
J2 6 J2 6 RESETBMCU PTD0 MCU Reset signal
J2 7 J2 7 N/C PTC17 No connection
J2 8 J2 8 VSYS_CSA_ALERT PTD2 Alert signal from the
VSYS’s current shunt
J2 9 J2 9 ELOAD_CSA_ALERT PTA16 Alert signal from the
ELOAD’s current
shunt
J2 10 J2 10 VBAT_CSA_ALERT PTD3 Alert signal from the
VBAT’s current shunt
J2 11 J2 11 N/C PTA17 No connection
J2 12 J2 12 VBUS_CSA_ALERT PTD1 Alert signal from the
VBUS’s current shunt
J2 13 J2 13 N/C PTE31 No connection
J2 14 J2 14 GND GND Ground
J2 15 J2 15 N/C N/C No connection
J2 16 J2 16 N/C VREFH No connection
J2 17 J2 17 N/C PTD6 No connection
J2 18 J2 18 SDA1 PTE0 Data signal of the I
2
C-
bus (PF1550)
J2 19 J2 19 N/C PTD7 Open
J2 20 J2 20 SCL1 PTE1 Clock signal of the
I
2
C-bus (PF1550)
J10 1 J10 1 N/C PTE20 No connection
J10 2 J10 2 N/C PTB0 No connection
J10 3 J10 3 N/C PTE21 No connection
J10 4 J10 4 N/C PTB1 No connection
J10 5 J10 5 N/C PTE22 No connection
J10 6 J10 6 2V5_ADC PTB2 Voltage reference for
ADC
J10 7 J10 7 N/C PTE23 No connection
J10 8 J10 8 ADC_1 PTB3 Analog signal to
ADC1