Datasheet

NXP Semiconductors
KTFRDMPF1550EVMUG
FRDM-PF1550EVM evaluation board
KTFRDMPF1550EVMUG All information provided in this document is subject to legal disclaimers. © NXP B.V. 2018. All rights reserved.
User guide Rev. 2.0 — 7 March 2018
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Figure 4. Test point locations
Table 6. Test point definitions
Test point name Signal name Description
TP1 VBUS_PORT 5.0 V power supply (from USB connector J3)
TP2 SW1OUT Output of the switcher 1
TP3 GND Ground (next to SW1OUT)
TP4 SW3OUT Output of the switcher 3
TP5 SW2OUT Output of the switcher 2
TP6 GND Ground (next to SW3OUT)
TP7 GND Ground (next to SW2OUT)
TP19 VSNVS Output of the VSNVS regulator
TP20 SW1IN Input of the switcher 1
TP24 VLDO1 Output of the VLDO1 regulator
TP25 SW3IN Input of the switcher 3
TP29 VLDO2 Output of the VLDO2 regulator
TP30 SW2IN Input of the switcher 2
TP33 VLDO3 Output of the VLDO3 regulator
TP34 VLDO1IN Input of the VLDO1 regulator
TP35 STANDBY STANDBY input
TP36 VREFDDR Output of the VREFDDR regulator
TP37 VLDO2IN Input of the VLDO2 regulator
TP38 PWRON PWRON input
TP39 USBPHY Output of the USBPHY regulator
TP40 VLDO3IN Input of the VLDO3 regulator
TP41 WDI Watchdog input from MCU
TP42 LICELL Coin cell input
TP43 VBATT_SH Battery voltage (before current shunt)