Datasheet

Table 46. Low power mode peripheral adders — typical value
Symbol Description Temperature (°C) Unit
-40 25 50 70 85 105
1
configured for low power mode using the
internal clock and continuous conversions.
1. Only LQFP and MAPBGA packages support the data in this column.
5.3.2.5 Power consumption operating behaviors
The maximum values stated in the following table represent characterized results
equivalent to the mean plus three times the standard deviation (mean + 3 sigma).
NOTE
The data at 105 °C is for MAPBGA and LQFP packages only.
Table 47. Power consumption operating behaviors
Symbol Description Typ. Max. Unit Notes
I
DDA
Analog supply current — See note mA 1
I
DD_HSRUN
Running CoreMark in Flash in
Compute Operation mode, Core at
96 MHz, bus at 24 MHz, flash at 24
MHz, VDD = 3 V
25 °C 14.21 17.32 mA 2, 3
I
DD_HSRUN
Running CoreMark in Flash, all
peripheral clock disabled, Core at 96
MHz, bus at 24 MHz, flash at 24
MHz, VDD = 3 V
25 °C 15.43 18.54 mA 2, 3
I
DD_HSRUN
Running CoreMark in Flash, all
peripheral clock enabled, Core at 96
MHz, bus at 24 MHz, flash at 24
MHz, VDD = 3 V
25 °C 20.01 23.12 mA 2, 3
I
DD_RUN
Running CoreMark in Flash in
Compute Operation mode, Core at
72 MHz, bus at 24 MHz, flash at 24
MHz, VDD = 3 V
25 °C 8.99 10.59 mA 2, 4
105 °C 9.43 10.88
I
DD_RUN
Running CoreMark in Flash all
peripheral clock disabled, Core at 72
MHz, bus at 24 MHz,flash at 24
MHz , VDD = 3 V
25 °C 10.1 11.70 mA 2, 4
105 °C 10.55 12.00
I
DD_RUN
Running CoreMark in Flash all
peripheral clock disabled, Core at 48
MHz, bus at 24 MHz, flash at 24
MHz , VDD = 3 V
25 °C 9.1 10.70 mA 2, 5
105 °C 9.54 10.99
I
DD_RUN
Running CoreMark in Flash all
peripheral clock disabled, Core at 24
MHz, bus at 12 MHz, flash at 12
MHz , VDD = 3 V
25 °C 5.57 7.17 mA 2, 5
105 °C 6.02 7.47
Table continues on the next page...
Electrical characteristics
74
Kinetis KL82 Microcontroller, Rev. 3, 08/2016
NXP Semiconductors