Datasheet

Properties Abbreviation Descriptions
Driver strength ND Normal drive
HD High drive
Default status after POR Hi-Z High impendence
H High level
L Low level
Pullup/ pulldown setting
after POR
PD Pullup
PU Pulldown
Slew rate after POR FS Fast slew rate
SS Slow slew rate
Passive Pin Filter after
POR
N Disabled
Y Enabled
Open drain N Disabled
1
Y Enabled
2
Pin interrupt Y Yes
1. When I2C module is enabled and a pin is functional for I2C, this pin is (pseudo-) open drain enabled. When UART or
LPUART module is enabled and a pin is functional for UART or LPUART, this pin is (pseudo-) open drain configurable.
2. PTA20 is a true open drain pin that must never be pulled above VDD.
4.3 Module signal description tables
The following sections correlate the chip-level signal name with the signal name used in
the module's chapter. They also briefly describe the signal function and direction.
4.3.1
Core Modules
Table 9. SWD Signal Descriptions
Chip signal name Module signal
name
Description I/O
SWD_DIO SWD_DIO Serial Wire Data I/O
SWD_CLK SWD_CLK Serial Wire Clock I
Pinouts
42
Kinetis KL82 Microcontroller, Rev. 3, 08/2016
NXP Semiconductors