Datasheet

121
MAP
BGA
100
LQFP
80
LQFP
64
MAP
BGA
64
LQFP
Pin Name Default ALT0 ALT1 ALT2 ALT3 ALT4 ALT5 ALT6 ALT7
K8 42 — — — PTA12 DISABLED PTA12 TPM1_CH0 FXIO0_D18
L8 43 — — — PTA13/
LLWU_P4
DISABLED PTA13/
LLWU_P4
TPM1_CH1 FXIO0_D19
K9 44 34 — — PTA14 DISABLED PTA14 SPI0_PCS0 LPUART0_
TX
FXIO0_D20
L9 45 35 — — PTA15 DISABLED PTA15 SPI0_SCK LPUART0_
RX
FXIO0_D21
J10 46 36 — — PTA16 DISABLED PTA16 SPI0_SOUT LPUART0_
CTS_b
FXIO0_D22
H10 47 37 — — PTA17 DISABLED PTA17 SPI0_SIN LPUART0_
RTS_b
FXIO0_D23
E6 48 38 H7 30 VDD VDD VDD
G7 49 39 G7 31 VSS VSS VSS
L11 50 40 H8 32 PTA18 EXTAL0 EXTAL0 PTA18 TPM_
CLKIN0
K11 51 41 G8 33 PTA19 XTAL0 XTAL0 PTA19 TPM_
CLKIN1
LPTMR0_
ALT1/
LPTMR1_
ALT1
J11 52 42 F8 34 RESET_b RESET_b RESET_b
H11 — — — — PTA29 DISABLED PTA29
G11 53 43 E6 35 PTB0/
LLWU_P5
ADC0_SE8/
TSI0_CH0
ADC0_SE8/
TSI0_CH0
PTB0/
LLWU_P5
I2C0_SCL TPM1_CH0 FXIO0_D0
G10 54 44 — — PTB1 ADC0_SE9/
TSI0_CH6
ADC0_SE9/
TSI0_CH6
PTB1 I2C0_SDA TPM1_CH1 FXIO0_D1
G9 55 — — — PTB2 ADC0_
SE12/
TSI0_CH7
ADC0_
SE12/
TSI0_CH7
PTB2 I2C0_SCL LPUART0_
RTS_b
FXIO0_D2
G8 56 — — — PTB3 ADC0_
SE13/
TSI0_CH8
ADC0_
SE13/
TSI0_CH8
PTB3 I2C0_SDA LPUART0_
CTS_b
FXIO0_D3
B11 — 45 F7 36 PTB4 DISABLED PTB4 EMVSIM1_
IO
C11 — 46 F6 37 PTB5 DISABLED PTB5 EMVSIM1_
CLK
F11 — 47 E7 38 PTB6 DISABLED PTB6 EMVSIM1_
VCCEN
E11 — 48 E8 39 PTB7 DISABLED PTB7 EMVSIM1_
PD
D11 — 49 D7 40 PTB8 DISABLED PTB8 EMVSIM1_
RST
E10 57 — — — PTB9 DISABLED PTB9 SPI1_PCS1
D10 58 — — — PTB10 DISABLED PTB10 SPI1_PCS0 FXIO0_D4
C10 59 50 — — PTB11 DISABLED PTB11 SPI1_SCK FXIO0_D5
L6 60 — — — VSS VSS VSS
Pinouts
34
Kinetis KL82 Microcontroller, Rev. 3, 08/2016
NXP Semiconductors