Datasheet

121
MAP
BGA
100
LQFP
80
LQFP
64
MAP
BGA
64
LQFP
Pin Name Default ALT0 ALT1 ALT2 ALT3 ALT4 ALT5 ALT6 ALT7
J1 19 16 F2 12 USB_VDD USB_VDD USB_VDD
J2 20 NC NC NC
21 NC
K2 ADC0_DP0 ADC0_DP0 ADC0_DP0
K1 ADC0_DM0 ADC0_DM0 ADC0_DM0
F5 22 17 G2 13 VDDA VDDA VDDA
G5 23 18 H3 14 VREFH VREFH VREFH
G6 24 19 H2 15 VREFL VREFL VREFL
F6 25 20 G1 16 VSSA VSSA VSSA
L2 26 21 H1 17 ADC0_DP1 ADC0_DP1 ADC0_DP1
L1 27 22 G3 18 ADC0_DM1 ADC0_DM1 ADC0_DM1
L3 28 23 F4 19 VREF_OUT/
CMP0_IN5/
ADC0_SE22
VREF_OUT/
CMP0_IN5/
ADC0_SE22
VREF_OUT/
CMP0_IN5/
ADC0_SE22
K4 29 24 G4 20 DAC0_OUT/
ADC0_SE23
DAC0_OUT/
ADC0_SE23
DAC0_OUT/
ADC0_SE23
H6 NC NC NC
K5 30 25 F5 21 RTC_
WAKEUP_B
RTC_
WAKEUP_B
RTC_
WAKEUP_B
L4 31 26 H4 22 XTAL32 XTAL32 XTAL32
L5 32 27 H5 23 EXTAL32 EXTAL32 EXTAL32
K6 33 28 G5 24 VBAT VBAT VBAT
34 VDD VDD VDD
35 VSS VSS VSS
L7 36 29 D4 25 PTA0 SWD_CLK TSI0_CH1 PTA0 LPUART0_
CTS_b
TPM0_CH5 FXIO0_D10 EMVSIM0_
CLK
SWD_CLK
H8 37 30 D5 26 PTA1 TSI0_CH2 TSI0_CH2 PTA1 LPUART0_
RX
FXIO0_D11 EMVSIM0_
IO
J7 38 31 E5 27 PTA2 TSI0_CH3 TSI0_CH3 PTA2 LPUART0_
TX
FXIO0_D12 EMVSIM0_
PD
H9 39 32 H6 28 PTA3 SWD_DIO TSI0_CH4 PTA3 LPUART0_
RTS_b
TPM0_CH0 FXIO0_D13 EMVSIM0_
RST
SWD_DIO
J8 40 33 G6 29 PTA4/
LLWU_P3
NMI_b TSI0_CH5 PTA4/
LLWU_P3
TPM0_CH1 FXIO0_D14 EMVSIM0_
VCCEN
NMI_b
K7 41 PTA5 DISABLED PTA5 USB0_
CLKIN
TPM0_CH2 FXIO0_D15
L10 VDD VDD VDD
K10 VSS VSS VSS
J9 PTA10/
LLWU_P22
DISABLED PTA10/
LLWU_P22
TPM2_CH0 EMVSIM1_
VCCEN
FXIO0_D16
H7 PTA11/
LLWU_P23
DISABLED PTA11/
LLWU_P23
TPM2_CH1 FXIO0_D17
Pinouts
Kinetis KL82 Microcontroller, Rev. 3, 08/2016
33
NXP Semiconductors