Datasheet

2.1.12 Watch dog

The Watchdog Timer (WDOG) keeps a watch on the system functioning and resets it

in case of its failure.

The WDOG has the following features:

• Clock source input independent from CPU/bus clock. Choice between low-power

oscillator (LPO) and external system clock.

• Unlock sequence for allowing updates to write-once WDOG control/configuration

bits.

• All WDOG control/configuration bits are writable once only within 256 bus clock

cycles of being unlocked.

• Programmable time-out period specified in terms of number of WDOG clock

cycles.

• Ability to test WDOG timer and reset with a flag indicating watchdog test.

• Windowed refresh option.

• Robust refresh mechanism.

• Count of WDOG resets as they occur.

• Configurable interrupt on time-out to provide debug breadcrumbs. This is

followed by a reset after 256 bus clock cycles.

2.2

Peripheral features

The following sections describe the features of each peripherals of the chip.

2.2.1

BME

The Bit Manipulation Engine (BME) provides hardware support for atomic read-

modify-write memory operations to the peripheral address space in Cortex-M0+ based

microcontrollers. It reduces up to 30% of the code size and up to 9% of the cycles for

bit-oriented operations to peripheral registers.

The BME supports unsigned bit field extract, load-and-set 1-bit, load-and-clear 1-bit,

bit field insert, logical AND/OR/XOR operations with byte, halfword or word-sized

data type.

Overview

Kinetis KL82 Microcontroller, Rev. 3, 08/2016

NXP Semiconductors