Datasheet
Table 4. Module clocks (continued)
Module Bus interface clock Internal clocks I/O interface clocks
TPM Bus clock TPM clock TPM_CLKIN0, TPM_CLKIN1
PDB Bus clock — —
PIT Bus clock — —
LPTMR Bus clock LPO, OSCERCLK,
MCGIRCLK, ERCLK32K
—
RTC Bus clock EXTAL32 —
Communication interfaces
USB FS OTG System clock USB FS clock —
USB DCD Bus clock — —
SPI System clock — DSPI_SCK
I2C Bus clock — I2C_SCL
LPUART Bus clock LPUART clock —
EMVSIM Bus clock EMVSIM clock —
FlexIO Bus clock FlexIO clock —
Human-machine interfaces
GPIO Platform clock — —
TSI Bus clock LPO, ERCLK32K,
MCGIRCLK
—
2.1.7 Security
Security state can be enabled via programming flash configuration field (0x40e). After
enabling device security, the SWD port cannot access the memory resources of the
MCU, and ROM boot loader is also limited to access flash and not allowed to read out
flash information via ROM boot loader commands.
Access interface Secure state Unsecure operation
SWD port Cannot access memory source by SWD
interface
The debugger can write to the Flash
Mass Erase in Progress field of the
MDM-AP Control register to trigger a
mass erase (Erase All Blocks)
command
ROM boot loader Interface
(UART/I2C/SPI/USB)
Limit access to the flash, cannot read
out flash content
Send “FlashEraseAllUnsecureh"
command or attempt to unlock flash
security using the backdoor key
This device features 128-bit unique identification number, which is programmed in
factory and loaded to SIM register after power-on reset.
Overview
14
Kinetis KL82 Microcontroller, Rev. 3, 08/2016
NXP Semiconductors