Datasheet

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
EXTAL XTAL
OSCILLATOR
EXTAL XTAL
OSCILLATOR
EXTAL XTAL
OSCILLATOR
EXTAL XTAL
OSCILLATOR
EXTAL XTAL
OSCILLATOR
EXTAL XTAL
OSCILLATOR
MCU
ADCx
MCU
ADCx
MCU
RESET_b
MCU
NMI_b
MCU
RESET_b
Supervisor Chip
OUT
Active high,
open drain
RESET_b
SWD_DIO
SWD_CLK
Analog input
High voltage input
RESET_b
VDD
VDD
VDD
VDD
VDD
VDD
Drawing Title:
Size Document Number Rev
Date: Sheet
of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-XXXXX PDF: SPF-XXXXX X
<Title>
C
Friday, February 06, 2015
<PageTitle>
1 1
___ ___
X
Drawing Title:
Size Document Number Rev
Date: Sheet
of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-XXXXX PDF: SPF-XXXXX X
<Title>
C
Friday, February 06, 2015
<PageTitle>
1 1
___ ___
X
Drawing Title:
Size Document Number Rev
Date: Sheet
of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-XXXXX PDF: SPF-XXXXX X
<Title>
C
Friday, February 06, 2015
<PageTitle>
1 1
___ ___
X
R
1 2
0.1uF
12
R5
1 2
Cx
12
0.1uF
12
RESONATOR
1 3
2
Cy
12
Cx
12
CRYSTAL
21
J1
HDR_5X2
1 2
3 4
65
7 8
9 10
Cy
12
10k
12
10k
12
R4
12
CRYSTAL
21
0.1uF
12
10k
12
CRYSTAL
21
R1
1 2
R3
1 2
C
12
RESONATOR
1 3
2
R2
1 2
10k
12
10k
12
RF
1 2
RS
12
BAT54SW
1 2
3
RS
12
RS
12
C
12
RF
1 2
RS
1 2
RF
1 2
CRYSTAL
21
Figure 48. Reset signal connection to external reset chip
NMI pin
Do not add a pull-down resistor or capacitor on the NMI_b pin, because a low
level on this pin will trigger non-maskable interrupt. When this pin is enabled as
the NMI function, an external pull-up resistor (10 kΩ) as shown in the following
figure is recommended for robustness.
If the NMI_b pin is used as an I/O pin, the non-maskable interrupt handler is
required to disable the NMI function by remapping to another function. The NMI
function is disabled by programming the FOPT[NMI_DIS] bit to zero.
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
EXTAL XTAL
OSCILLATOR
EXTAL XTAL
OSCILLATOR
EXTAL XTAL
OSCILLATOR
EXTAL XTAL
OSCILLATOR
EXTAL XTAL
OSCILLATOR
EXTAL XTAL
OSCILLATOR
MCU
ADCx
MCU
ADCx
MCU
RESET_b
MCU
NMI_b
MCU
RESET_b
Supervisor Chip
OUT
Active high,
open drain
RESET_b
SWD_DIO
SWD_CLK
Analog input
High voltage input
RESET_b
VDD
VDD
VDD
VDD
VDD
VDD
Drawing Title:
Size Document Number Rev
Date: Sheet
of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-XXXXX PDF: SPF-XXXXX X
<Title>
C
Friday, February 06, 2015
<PageTitle>
1 1
___ ___
X
Drawing Title:
Size Document Number Rev
Date: Sheet
of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-XXXXX PDF: SPF-XXXXX X
<Title>
C
Friday, February 06, 2015
<PageTitle>
1 1
___ ___
X
Drawing Title:
Size Document Number Rev
Date: Sheet
of
Page Title:
ICAP Classification: FCP: FIUO: PUBI:
SCH-XXXXX PDF: SPF-XXXXX X
<Title>
C
Friday, February 06, 2015
<PageTitle>
1 1
___ ___
X
R
1 2
0.1uF
12
R5
1 2
Cx
12
0.1uF
12
RESONATOR
1 3
2
Cy
12
Cx
12
CRYSTAL
21
J1
HDR_5X2
1 2
3 4
65
7 8
9 10
Cy
12
10k
12
10k
12
R4
12
CRYSTAL
21
0.1uF
12
10k
12
CRYSTAL
21
R1
1 2
R3
1 2
C
12
RESONATOR
1 3
2
R2
1 2
10k
12
10k
12
RF
1 2
RS
12
BAT54SW
1 2
3
RS
12
RS
12
C
12
RF
1 2
RS
1 2
RF
1 2
CRYSTAL
21
Figure 49. NMI pin biasing
Debug interface
This MCU uses the standard ARM SWD interface protocol as shown in the
following figure. While pull-up or pull-down resistors are not required
(SWD_DIO has an internal pull-up and SWD_CLK has an internal pull-down),
external 10 kΩ pull resistors are recommended for system robustness. The
RESET_b pin recommendations mentioned above must also be considered.
Design considerations
Kinetis KL82 Microcontroller, Rev. 3, 08/2016
127
NXP Semiconductors