Datasheet

The CM0+ core adds support for a programmable Vector Table Offset Register
(VTOR) to relocate the exception vector table after reset. This device supports booting
from:
• internal flash
• ROM
The Flash Option (FOPT) register in the Flash Memory module (FTFA_FOPT) allows
the user to customize the operation of the MCU at boot time. The register contains read-
only bits that are loaded from the NVM's option byte in the flash configuration field.
Below is boot flow chart for this device.
00 = Internal Flash
01 = Reserved
10 = ROM -> QSPI Yes
11 = ROM -> QSPI No
POWER ON
[BOOTSRC_SEL] = 0x
Chip Flash?
Boot from On-
QSPI ?
Configure
RESET module
BOOT ROM module
present?
QSPI
Configure and boot
from internal flash.
Power On Reset(POR)
Reset to Processor
Load BCA
Image Download with timeout
[BOOTSRC_SEL] =1x
Yes
No
Configure QSPI
No
Config Failure
Yes
No
Yes
Jump to PC in vector table
FOPT [BOOTSRC_SEL]:
[BOOTSRC_SEL] =11
[BOOTSRC_SEL] =10
detect mode or boot pin
Peripheral
asserted?
(Boot Configuration Area)
BOOTPIN_OPT=0?
BOOTCFG
Pin assert?
Yes
No
Yes
No
Figure 2. Boot Flow For Devices with QSPI
The blank chip is default to boot from ROM and remaps the vector table to ROM base
address, otherwise, it remaps to flash address.
Overview
10
Kinetis KL82 Microcontroller, Rev. 3, 08/2016
NXP Semiconductors