Datasheet

U1
U2 U3
U4
U5
USB_CLKIN
ULPI_DIR/ULPI_NXT
(control input)
ULPI_DATAn (input)
ULPI_STP
(control output)
ULPI_DATAn (output)
Figure 24. ULPI timing diagram
4.4.7 SAI electrical specifications
All timing requirements are specified relative to the clock period or to the minimum
allowed clock period of a device
Table 45. Master mode SAI Timing
no Parameter Value Unit
Min Max
Operating Voltage 2.7 3.6 V
S1 SAI_MCLK cycle time 40 - ns
S2 SAI_MCLK pulse width high/low 45% 55% MCLK
period
S3 SAI_BCLK cycle time 80 - BCLK
period
S4 SAI_BCLK pulse width high/low 45% 55% ns
S5 SAI_BCLK to SAI_FS output valid - 15 ns
S6 SAI_BCLK to SAI_FS output invalid 0 - ns
S7 SAI_BCLK to SAI_TXD valid - 15 ns
S8 SAI_BCLK to SAI_TXD invalid 0 - ns
S9 SAI_RXD/SAI_FS input setup before SAI_BCLK 28 - ns
S10 SAI_RXD/SAI_FS input hold after SAI_BCLK 0 - ns
USB electrical specifications
MPC5748G Microcontroller Datasheet Data Sheet, Rev. 2, 05/2014.
Freescale Semiconductor, Inc.
Preliminary
51