Datasheet

3. The MediaLB driver can release the MLBDAT/MLBSIG line as soon as MLBCLK is low; however, the logic state of the final

driven bit on the line must remain on the bus for tmdzh. Therefore, coupling must be minimized while meeting the

maximum load capacitance listed.

USB electrical specifications

4.4.6.1 USB electrical specifications

The USB electricals for the USB On-the-Go module conform to the standards

documented by the Universal Serial Bus Implementers Forum. For the most up-to-date

standards, visit http://www.usb.org.

4.4.6.2 ULPI timing specifications

The ULPI interface is fully compliant with the industry standard UTMI+ Low Pin

Interface. Control and data timing requirements for the ULPI pins are given in the

following table. These timings apply to synchronous mode only. All timings are

measured with respect to the clock as seen at the USB_CLKIN pin.

Table 44. ULPI timing specifications

Num Description Min. Typ. Max. Unit

USB_CLKIN

operating

frequency

— 60 — MHz

USB_CLKIN duty

cycle

— 50 — %

U1 USB_CLKIN clock

period

— 16.67 — ns

U2 Input setup (control

and data)

5 — — ns

U3 Input hold (control

and data)

1 — — ns

U4 Output valid

(control and data)

— — 9.5 ns

U5 Output hold (control

and data)

1 — — ns

4.4.6

USB electrical specifications

MPC5748G Microcontroller Datasheet Data Sheet, Rev. 2, 05/2014.

Preliminary

Freescale Semiconductor, Inc.