Datasheet

1. All parameters specified for VDD_HV_IOx = 3.3 V -5%, +±10%, TJ = –40 oC / 150 oC.
4.4.3 uSDHC specifications
Table 38. uSDHC switching specifications
Num Symbol Description Min. Max. Unit
Card input clock
SD1 fpp Clock frequency (Identification mode) 0 400 kHz
fpp Clock frequency (SD\SDIO full speed) 0 25 MHz
fpp Clock frequency (SD\SDIO high speed) 0 40 MHz
fpp Clock frequency (MMC full speed) 0 20 MHz
f
OD
Clock frequency (MMC full speed) 0 40 MHz
SD2 t
WL
Clock low time 7 — ns
SD3 t
WH
Clock high time 7 — ns
SD4 t
TLH
Clock rise time — 3 ns
SD5 t
THL
Clock fall time — 3 ns
SDHC output / card inputs SDHC_CMD, SDHC_DAT (reference to SDHC_CLK)
SD6 t
OD
SDHC output delay (output valid) -5 6.5 ns
SDHC input / card inputs SDHC_CMD, SDHC_DAT (reference to SDHC_CLK)
SD7 t
ISU
SDHC input setup time 5 — ns
SD8 t
IH
SDHC input hold time 0 — ns
SD2SD3 SD1
SD6
SD8
SD7
SDHC_CLK
Output SDHC_CMD
Output SDHC_DAT[3:0]
Input SDHC_CMD
Input SDHC_DAT[3:0]
Figure 20. uSDHC timing
FlexRay electrical specifications
MPC5748G Microcontroller Datasheet Data Sheet, Rev. 2, 05/2014.
Freescale Semiconductor, Inc.
Preliminary
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