Datasheet
Table 36. TxD output characteristics (continued)
Name Description
1
Min Max Unit
dCCTxD
01
Sum of delay between Clk to Q of the last FF and the final
output buffer, rising edge
25 ns
dCCTxD
10
Sum of delay between Clk to Q of the last FF and the final
output buffer, falling edge
25 ns
1. All parameters specified for V
DD_HV_IOx
= 3.3 V -5%, +±10%, TJ = –40 °C / 150 °C, TxD pin load maximum 25 pF.
2. For 3.3 V ± 10% operation, this specification is 10 ns.
dCCTxD
10
dCCTxD
01
TxD
PE_Clk*
*FlexRay Protocol Engine Clock
Figure 19. TxD Signal propagation delays
4.4.2.4 RxD
Table 37. RxD input characteristic
Name Description
1
Min Max Unit
C_CCRxD Input capacitance on
RxD pin
7 pF
uCCLogic_1 Threshold for detecting
logic high
35 70 %
uCCLogic_0 Threshold for detecting
logic low
30 65 %
dCCRxD
01
Sum of delay from
actual input to the D
input of the first FF,
rising edge
10 ns
dCCRxD
10
Sum of delay from
actual input to the D
input of the first FF,
falling edge
10 ns
FlexRay electrical specifications
MPC5748G Microcontroller Datasheet Data Sheet, Rev. 2, 05/2014.
44
Preliminary
Freescale Semiconductor, Inc.