Datasheet

NXP Semiconductors
88W8977
2.4 GHz/5 GHz Dual-band 1x1 Wi-Fi 4
®
and Bluetooth
®
5 Combo SoC
88W8977 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2020. All rights reserved.
Product short data sheet Rev. 1 — 13 July 2020
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4.4.9 LTE external coexistence interface
Table 9. LTE interface
Pin Name Supply No Pad
Power State
Reset
State
HW
State
PD
State
PD Prog Internal PU PU PD
UART_LTE_SIN VIO tristate input input tristate yes weak PU yes yes
UART_LTE_SIN (input)
UART_LTE_SOUT VIO tristate input input tristate yes weak PU yes yes
UART_LTE_SOUT (output)
4.4.10 PCM interface
Table 10. PCM interface pins (MFP)
NOTE: Pins may be Multi-Functional Pins (MFP). See pin descriptions for functional modes.
Pin Name Type Supply Description
PCM_DIN I VIO Receive PCM input. GPIO[4] input/output
PCM_DOUT O VIO Transmit PCM output. GPIO[5] input/output
PCM_SYNC I/O VIO PCM frame sync. GPIO[7] input/output
• Output if master
• Input if slave
PCM_CLK I/O VIO PCM data clock. GPIO[6] input/output
• Output if master
• Input if slave
4.4.11 Power management interface
Table 11. Power management interface pins (MFP)
NOTE: Pins may be Multi-Functional Pins (MFP). See pin descriptions for functional modes.
Pin Name Type Supply Description
DVSC[1] O VIO Digital voltage scaling control output signal. GPIO[3] input/output
DVSC[0] O VIO Digital voltage scaling control output signal. GPIO[2] input/output