Datasheet

1998 Feb 23 5
Philips Semiconductors Product specification
Dual D-type flip-flop with set and reset;
positive-edge trigger
74HC/HCT74
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications” .
Output capability: standard
I
CC
category: flip-flops
AC CHARACTERISTICS
GND = 0 V; t
r
= t
f
= 6 ns; C
L
= 50 pF
SYMBOL PARAMETER
T
amb
(°C)
UNIT
TEST CONDITIONS
74HC
V
CC
(V)
WAVEFORMS+25 −40 to +85 −40 to +125
min. typ. max. min. max min. max.
t
PHL
/ t
PLH
propagation delay
nCP to nQ, nQ
47 175 220 265 ns 2.0 Fig.6
17 35 44 53 4.5
14 30 37 45 6.0
t
PHL
/ t
PLH
propagation delay
nS
D
to nQ, nQ
50 200 250 300 ns 2.0 Fig.7
18 40 50 60 4.5
14 34 43 51 6.0
t
PHL
/ t
PLH
propagation delay
nR
D
to nQ, nQ
52 200 250 300 ns 2.0 Fig.7
19 40 50 60 4.5
15 34 43 51 6.0
t
THL
/ t
TLH
output transition time 19 75 95 110 ns 2.0 Fig.6
7 15 19 22 4.5
6 13 16 19 6.0
t
W
clock pulse width
HIGH or LOW
80 19 100 120 ns 2.0 Fig.6
16 7 20 24 4.5
14 6 17 20 6.0
t
W
set or reset pulse width
LOW
80 19 100 120 ns 2.0 Fig.7
16 7 20 24 4.5
14 6 17 20 6.0
t
rem
removal time
set or reset
30 3 40 45 ns 2.0 Fig.7
6 1 8 9 4.5
5 1 7 8 6.0
t
su
set-up time
nD to nCP
60 6 75 90 ns 2.0 Fig.6
12 2 15 18 4.5
10 2 13 15 6.0
t
h
hold time
nCP to nD
3 −6 3 3 ns 2.0 Fig.6
3 −2 3 3 4.5
3 −2 3 3 6.0
f
max
maximum clock pulse
frequency
6.0 23 4.8 4.0 MHz 2.0 Fig.6
30 69 24 20 4.5
35 82 28 24 6.0