Datasheet

1998 Jun 04 6
Philips Semiconductors Product specification
8-bit serial-in/serial or parallel-out shift
register with output latches; 3-state
74HC/HCT595
FUNCTION TABLE
Notes
1. H = HIGH voltage level; L = LOW voltage level
↑ = LOW-to-HIGH transition; ↓ = HIGH-to-LOW transition
Z = high-impedance OFF-state; NC = no change
X = don’t care.
INPUTS OUTPUTS
FUNCTON
SH
CP
ST
CP
OE MR D
S
Q
7
’Q
N
X X L L X L NC a LOW level on MR only affects the shift registers
X ↑ L L X L L empty shift register loaded into storage register
X X H L X L Z shift register clear. Parallel outputs in high-impedance
OFF-state
↑ XLHHQ
6
’ NC logic high level shifted into shift register stage 0. Contents
of all shift register stages shifted through, e.g. previous
state of stage 6 (internal Q
6
’) appears on the serial output
(Q
7
’)
X ↑ LHXNCQ
n
’ contents of shift register stages (internal Q
n
’) are
transferred to the storage register and parallel output
stages
↑↑LHXQ
6
’Q
n
’ contents of shift register shifted through. Previous
contents of the shift register is transferred to the storage
register and the parallel output stages.